Engineer Design

Tony Wong

925-***-****

********@*****.***

WORK EXPERIENCE

Panasonic Wireless Research Lab (formerly Tropian) – Cupertino, CA

Digital Engineer, Apr 2005 - date

- Perform digital design, optimization, and verification of RFIC for cellular and wireless

products and devices.

- Tested and validated an All Digital Phase-Locked Loop (ADPLL) in simulation and in hardware.

- Tasks include IC/FPGA hardware test and verification including debugging of hardware platform

and working with fellow engineers for system level bring up. System simulation using Matlab

Simulink and Cadence NCSim environment. IC design, synthesis, simulation using 65nm CMOS process.

- Test equipment used: R&S CMU200, FSEA, FSIQ, and Agilent 4406, E5052B.

- Implement and test of an FPGA development platform for a UMTS/GSM/EDGE transmitter. This

platform was migrated onto an RFIC using 110nm Panasonic technology, and validated in the lab.

- Tasks include perform Synopsys synthesis and verify timing simulation of all RTL modules,

working with software ATE and systems team for system bring up, and support FPGA ASIC emulation

platform (FPGA, HDL, PCB, software).

- Used tools: Altera Quartus, Synopsys Synplify Pro, Design Compiler, Power Compiler, Cadence

NC-Verilog, Matlab Simulink.

- Assisted Designers to implement FPGA builds used to demonstrate and validate design concepts

and improvements. Supported simulation and verification of the design as well as FPGA

prototype hardware testing.

- Tuned up test boards for proper output power levels, with optimal ACLR distortion levels.

- Assisted System Design Team with modifying the SynDSP/Matlab models, such that the

simulation models match the Verilog RTL models.

VEGA VISTA, Mountain View, CA

ASIC Design Engineer, 2000-2003

- Design and implement an FPGA prototype used in a motion-based user interface

control for mobile devices. The target is an SoC using 0.25 micron TSMC technology.

- Tasks include design specifications, Verilog RTL coding of serial I/O interfaces (UART, I2C,

SPI), Cyclic Redundancy Check (CRC) generator and checker, transmit/receive interface, and dual

port RAM controller logic.

- Used several tools for Xilinx SpartanII & Virtex FPGAs, including iSE tools,

Synopsys FPGA Compiler, FPGA Express, Synopsys and PrimeTime, Synplicity, Mentor

Graphics (MTI) Modelsim, VCS, and HP Logic Analyzer, Oscilloscope.

University of BC, Vancouver, BC

Research Engineer, 1999-2000

- Perform research in the field of testing analog/mixed-signal integrated circuits.

- Tasks include simulation and evaluation of thermal DFT monitoring technique for

analog/mixed-signal IC, fault generation and insertion, sensitivity and tolerance

analysis, Monte Carlo simulations, CMOS VCO characterization.

- Used tools: Cadence Analog Artist, Virtuoso, Silicon Ensemble, Spectre, SPICE.

PMC-SIERRA, Burnaby, BC

CAD Engineer, 1999

- Develop a back-end (place-and-route) test flow and methodology in 0.35 micron TSMC library.

- Tasks include re-design and implement standard cells and IP, write scripts that automate the

usage of tools, modify simulation and synthesis library models.

- Used tools: Milkyway (database), Apollo (Place & Route), Hercules (LVS & DRC), Star

RC (parasitic extraction).

Nortel Networks, Ottawa, Canada

Systems Engineer, Apr 1997 – Aug 1997 (Intern)

- Tested and provided linecard calibration for Nortel’s Synchronous Optical Network Digital

Multiplexed System (SONET/DMS or S/DMS).

- Supported the verification of system level interface circuitry for Northern Telecom’s

SONET OC-3 chip.

- Developed and implemented a Windows NT GUI for monitoring and testing network interface

application.

Glenayre Electronics, Burnaby, BC

Product Test Engineer, Aug 1996 – Dec 1996 (Intern)

- Assisted in the test and development of an integrated voice/data radio, Wireless Line

Extender (WiLE).

- Developed and executed Feature Test Plans, sets of tests that exercise various functional

blocks of the WiLE and test the units to industry standards (vibration, thermal, endurance, EMI).

- Prototyped test circuitry on large breadboards.

Spectrum Signal Processing, Burnaby, BC

Hardware Engineer, Jan 1996 – Apr 1996 (Intern)

- Performed hardware verification tests for a new modem/fax multimedia product.

- Built test circuits (PCB layout using OrCAD, board assembly, sourcing parts, and testing).

- Assembled boards, soldered microchips (e.g., DSP, ASICs, ICs) and surface-mount components

EDUCATION

Simon Fraser University, Vancouver, Canada

- B.A.Sc, Electrical Engineering, Electronics Concentration

- Graduate-level courses: DSP systems, Microelectronics, VLSI, Digital control systems, Wireless

Communications, Microprocessor Design, Computer Architecture.

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