Manager Engineer

Elstan Anthony Fernandez

No***AB, Amar Jyothi Saroj Nagar. Viswanathapuram.

THUDIALUR. COIMBATORE 641034

Mobile:91-822*******

E-mail: *******@*****.***.**

Seeking a position for Manager - IC Packaging, Program Manager, Technical Manager Sales. Customer Support Technical,

More than 12 years of experience in the semiconductor packaging industry.

Deep and Solid knowledge of IC fabrication and packaging process.

Project Management skills in BGA/Flip Chip packaging.

Multiple projects coordination & Subcontractor vendor communication.

FMEA, SPC, DOE and familiarity in assembly processes and controls

Patents Registered in European Patent Office and US: 7 patents / 9 patents pending for registration. Remarkable experience with electronic packaging materials

Exceptional knowledge of PCB materials and PCB fabrication processes

Wide knowledge of Semiconductor materials and Semiconductor fabrication processes

Proficient with Cadence, Sigrity, and AutoCAD.

Deep understanding of IC fabrication processes

Immense ability to prepare performance packages and various reliability methods

Amazing ability to interpret mechanical concepts.

Position: BGA Design Engineer Duration: 1999 to 2001

Singapore Technologies Test and Assembly Services. - www.stts-chippac.com

• Designing BGA substrates for various customers, co-coordinating with the design team.

• Tool-up the design for substrate manufacturing and follow up of delivery schedule.

• Co-coordinating with the customer for package selection and design schedules.

• Selection of substrate vendor according to design needs and methodology.

• Designing substrates according to substrate manufactures design rules and capability.

• Designed Enhanced BGA substrates with cavity and Flex substrates for flexible circuits.

• Good knowledge of tooling up substrates using AUTOCAD and JEDEC specifications.

Position: Senior Engineer -II Duration: 2001 to 2004

INFINEON TECHNOLOGIES - www.infineon.com

• Designing BGA substrates for various customers, co-coordinating with the design team.

• Tool-up the design for substrate manufacturing and follow up of delivery schedule.

• Co-coordinating with the customer for package selection and design schedules.

• Selection of substrate vendor according to design needs and methodology.

• Designing substrates according to substrate manufactures design rules and capability.

• Designed Enhanced BGA substrates with cavity and Flex substrates for flexible circuits.

• Good knowledge of tooling up substrates using AUTOCAD and specifications

• Good knowledge of Cadence / Encore software for fast design turn around timing.

• Project Management skills and methodology.

• Low Profile Ball Grid Array and Flip Chips project handling, co-coordinating and delivery.

• Co-coordinating NPI package build (wafer back grinding, die-attach, wire bonding, molding, solder ball attach, marking, singulation and shipment)

• Device and Product qualification for both the Customer and Infineon Tech.

• Co-coordinating package testing (MSL1 to MSL3, Jedac specification to customers PMC, Matusa Japanese specification) and well versed with production SPC, FMEA, DOEs.+

• Transferring Engineering Builds to Production for Volume production.

Position: Staff Engineer -II Duration: 2004-2007

UNISEM (M) BERHAD (IPOH) – MALAYSIA www.unisem.com.my

• Designing BGA substrates for various customers, co-coordinating with the design team.

• Tool-up the design for substrate manufacturing and follow up of delivery schedule.

• Co-coordinating with the customer for package selection and design schedules.

• Selection of substrate vendor according to design needs and methodology.

• Designing substrates according to substrate manufactures design rules and capability.

• Designed Enhanced BGA substrates with cavity and Flex substrates for flexible circuits.

• Good knowledge of tooling up substrates using AUTOCAD and specifications

• Good knowledge of Cadence software for fast design turn around timing.

• Knowledge in lead frame design tool-up and vendor manufacture follow-up

• Engineering Build coordination and follow-up with Unisem UK.

• Good knowledge on IC packaging (Wafer Back Grinding, Die Attach, Wire bonding, Molding, Ball Attach, Singulation and Marking) and IC testing.

• Qualification of the device and package for both the customer and Unisem.

• Was stationed in Unisem. Wales UK for four months (Feb-May 2007) to assist in BGA Project Management and BGA designs at customer’s site, in US and UK.

Position: Senior Staff Engineer -II (BGA Package Design and Development)

Duration: Jan-Nov 2007

UNISEM (M) CHENGDU – SICHUAN PR.CHINA

• Designing BGA substrates for various customers, co-coordinating with the design team.

• Tool-up the design for substrate manufacturing and follow up of delivery schedule.

• Co-coordinating with the customer for package selection and design schedules.

• Selection packaging materials and technologies for the customers

• Coordinating and follow-up of Engineering samples for customers .

• Project management of all BGA packages at Unisem Chengdu.

• Planning and executing NPI projects for Asian, EU and US Customers.

• Meeting customers directly and coordinating with them for BGA packages with new technologies according to market survey.

• Planning and Implementing Volume ramp-up production of BGA packages.

• IC Device and package qualification for the customer and Unisem. Chengdu.

• Key and Vital Role player from Package Concept, Marketing, Design, Simulation, Prototype Engineering and Ramp-up Production.

Position: Senior Manager (UFD, Flash Drives, Memory Sticks – Package Engineering) Duration: Dec 2007– Nov 08

MOSERBAER INDIA LTD., New Delhi.

• Complete responsibility for Memory Devices and memory cards.

• Planning & Package Engineering, Prototype Samples to Volume Production

• Planning and executing NPI projects for Indian and Overseas Markets.

Position: Senior Manager (Package Engineering & Test ) Duration: Nov,2008 March 2009

INSILICA Semiconductors. Bangalore

• Packaging Silicon Chips for various devices.

• From Design IO List to silicon IC packaging – Planning and Execution.

• Coordinating Test from Wafer fabrication to Testing of Packaged Silicon Chips.

• Coordinating production to drop shipment to customers worldwide.

• NPI – Study and Feasibility for customers.

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Position: Senior Manager (UFD, Flash Drives, Memory Sticks – Package Engineering) Duration: April 2009 –Dec 2010

MOSERBAER INDIA LTD., New Delhi.

• Complete responsibility for Memory Devices and memory cards.

• Planning & Package Engineering, Prototype Samples to Volume Production

• Planning and executing NPI projects for Indian and Overseas Markets.

• Diploma in Mechanical Draughtsman ship. (India)

• Diploma in Semiconductor Technology. (Temasek Polytechnique. Singapore)

• Bachelor Degree in BS Computing and Information Technology. (Annamalai Uni. Singapore)

• Attended training in Arizona (US) Tempe for Avanti Encore (STATS)

• Attended seminars and trained for designing in Cadence.

• Was stationed in Unisem Europe (Wales) (Feb-May 07) for project management training.

I HAVE PREVIOUS EXPERIENCE AS A PCB DESIGNER FOR ALMOST AROUND 10 YEARS. SOFTWARE USED WERE PCAD, PROTEL, EEDESIGNER, And worked on SMT assembly lines as well.

I have worked on SMT machines to qualify LGAs at Unisem Malaysia and have complete knowledge to run and maintain the SMT Lines. And also worked on documentation for various products and Patents -Technical Writer.

Since my resume would run into pages I have intentionally not highlighted this.

Available upon request

Sri Ramesh (QA manager)

605-***-**** ext 549, ***@******.***.**

• Martin Tominlson (STATS, Sales Exec. London.UK)

STATS ChipPAC Ltd

Godalming Business Centre, Woolsack Way, Godalming

Surrey. GU7 1XW. Tel: +44-148*-******

• Martial Status: Married

• Languages known : English, Hindi, French, & Tamil (expert level)

• Mandarin – Chinese Beginner’s level

Willing to travel (100% of duty time) and Willing to relocate anywhere.

Contact this candidate