Steffen Rochel
Burlingame, CA **010
408-***-**** *************@*****.***
PRODUCT ENGINEERING & DEVELOPMENT LEADER
A proven Product Development and Project Manager with a record of driving successful new product introductions and enhancements while closely managing the efforts of as many as 20 direct reports and supporting development staffs as large as 61 professionals.
A builder of high performance technical and business teams with personal and practical experience in the individual roles of both business and technical team members. A record of superior service as a Vice President of Engineering, Group Director, and Director of New Technology Development and early career success as an individual contributor in the development of hardware enabling software.
Technically savvy and proficient with Windows/Linux operating systems, software development environments and tools, programming and scripting languages, Microsoft Office, and electronic design automation software. Knowledgeable in all aspects of IC design and high performance software engineering.
CORE COMPENTENCIES
Project Management • Product Development
Multi-national and multi-cultural Team Development & Leadership
Electronic Design Automation • Technology Commercialization • Client Relationship Management
Vendor Relationship Management • Modeling and Simulation • IC Design • Silicon Validation
Software Quality • Data Structure and Algorithm Development and Optimization
C • C++ • Java • Perl • Python • Tcl/Tk • SQL • PHP
Fluid in English and German
REFERENCES AND RECOMMENDATIONS
http://www.linkedin.com/in/steffenrochel
EXPERIENCE
Blaze DFM, In. Sunnyvale, CA 2006-2008
A software developer supporting chip designers and manufacturers including TSMC and Samsung.
Vice President, Engineering
Managed R&D organization with up to 20 direct reports. Drove the design optimization with Blaze MO for each first design with all strategic customers. Managed 65nm and 45nm test chip development and silicon validation of CD biasing technologies with two foundries as well as product integration of Blaze Halo and TSMC litho simulation qualification for 65nm and 45nm. Managed foundry relationship with TSMC, Samsung, and ST. Served as Executive Sponsor for ST Microelectronics.
Achievements:
Secured a highly valuable customer reference for future initiatives with foundries and other customers; delivered a 20% standby power reduction at full chip using the Blaze MO technology. Worked in close collaboration with a leading edge graphic chip company to define the methodology enabling design optimization that optimized its chip standby power.
Successfully addressed all technical issues driving the completion of an exclusive technology license agreement with TSMC, the largest semiconductor foundry in the world. The license enabled TSMC to offer Blaze DFM Technology as a “Power Trim Service”.
Personally resolved all technical issues related to the technology license negotiation by working in close collaboration with TSMC R&D personnel and closely coordinating the activities of Blaze DFM R&D professionals.
Delivered 10x performance improvement, 2x memory reduction, and up to 2x Quality of Results improvement for Blaze MO.
Steffen Rochel Page Two
408 836 549 *************@*****.***
Cadence Design Systems, San Jose, CA
A company providing front-to-back design tools and services for all aspects of semiconductor design. Cadence acquired Simplex Solutions in 2002.
Group Director, X Technology R&D 2005-2006
Directed the efforts of 50 professionals while closely managing a X Architecture R&D team developing and delivering an integrated X-aware P&R solution supporting 90nm and 65nm. Guided the development and personally contributed to the architecture of the X technology integration into SoC Encounter P&R system. Provided engineering support for all customer production tape-out using X technology.
Achievements:
Fueled the development of a P&R solution supporting 90nm and 65nm incorporating X-Architecture, a new technology invented by Simplex Solutions that enabled the diagonal routing of IC. Guided the effort of a team delivering the Place&Route system that enables the usage of diagonal routing by customers. The system has been used successfully by major chip design companies to improve chip performance by more than 10% while reducing power consumption.
Group Director, Electrical Verification Products 2004-2005
Orchestrated the efforts of 61 professionals while serving as the Product Manager guiding the development of Cadence Electrical Verification products including Assura RCX, Fire&Ice QX, and VoltageStorm driving annual sales of $50 M.
Achievements:
Managed product launch of VoltageStorm DG and integration of Cadence multiple parasitic extraction technologies into a single product.
Director, VoltageStorm R&D and Product Manager 2002-2004
Ensured the growth of the company’s market share and revenue by focusing software development on the needs of key customer and rapidly developing solutions to meet needs. Guided the efforts of 25 software developers charged with defining, designing, and developing the product features for dynamic power distribution system analysis product, VoltageStorm DG. Served as a hands on contributor in the development of new features and capabilities within the VoltageStorm family of products.
Achievements:
Played a key role in developing the architecture and features of VoltageStorm product family. Guided the development of product technology still used by customers today.
Enabled a jump in revenues from $10M annually to $30M annually in only three years by working in close collaboration with the company’s sales, applications, marketing, and R&D teams. Personally fostered positive client relationships with the strategic client’s key decision makers.
Manager/ Individual Contributor, R&D, Simplex Solutions 1996-2002
Guided the efforts of 15 professionals developing the electrical/physical verification products, VoltageStorm and ElectronStorm, for transistor and gate level power distribution and electromigration analysis of IC. Personally architected the ElectronStorm product as well as contributed to the architecture of the gate level power distribution system analysis product. Orchestrated the development, implementation, and validation of the products as the company’s annual revenues grew to $15M.
Early career success as a technical marketing engineer with Mentor Graphics and a manager for the German firm Anacad GmbH, later on acquired by Mentor Graphics.
EDUCATION
PhD Electrical Engineering, Technical University Ilmenau, Ilmenau, Germany
Diplom Electrical Engineering, Technical University Ilmenau, Ilmenau, Germany