Project Engineer

CURRICULUM VITAE

RIYAZ SHAIK

Phone : 91-741*******

E-Mail : **********@*****.***

Objective_______________________________________________________

Looking for a challenging opportunity with establishment that would offer a career growth and further extract the best of my ability.

Skills__________________________________________________________

Languages : C,C++, unix(Basics)

Operating Systems : Windows98,XP,Fedora(linux)

Tools : Calibre(DRC/LVS),Tanner L- Edit,Hiper verify

Technologies : 45nm, 65nm

Education Qualifications__________________________________________

B.TECH in Electrical and Electronics engineering (2003-2007) from JNTU with 58.6% aggregate.

Intermediate: Board of Intermediate Education 71.7% aggregate.

S.S.C with 74.5% aggregate

Experience______________________________________________________

2years,4months Experieance in TechForce Engineering Services Pvt. Ltd. As Design Engineer in VLSI Domain .

Triend in analog and mixed signal custom layout/design,

And triend in CG CORE EL About Calibre tool,

VLSI Projects: _________________________________________________

Project # 1

Title : 45nm Standard Cell Library Development Work

Client : Virage Logic

Technology : 45nm technology (TSMC fab)

Tools : L-Edit, Hiper Verify for DRC

Description : The Project involves the layout of Standard cells and Double Height cells, The layouts are built with 12 tracks and 9 tracks. verified DRC (Caliber)/LVS/DFM/EM for the above cells with prominence to pin accessibility, Cell area minimization, minimizing higher metal routing. Running verification utilities and quality check using internal scripts.

Project # 2

Title : 65nm Standard Cell Library Development Work

Client : Virage Logic

Technology : 65nm Technology (TSMC Fab)

Tools : L-Edit, Hiper Verify for DRC

Description : The Project involves the Layout Design of Standard cells and Custom cells for different libraries like 12 & 9 tracks. Development of Standard cells using Tanner Tool and verified DRC (Caliber)/LVS/DFM/EM for the above cells with prominence to pin accessibility, Cell area minimization, minimizing higher metal routing. Running verification utilities and quality check using internal scripts.

Project # 3

Title : 45nm Standard Cell Library Development Work

Client : Virage Logic

Technology : 45nm Technology (TSMC Fab)

Tools : L-Edit, Hiper Verify for DRC

Description : The Project involves the Layout Design of Standard cells and Custom cells for different libraries like 12 & 9 tracks. Development of Standard cells Combinational and Sequential) using Tanner Tool and verified DRC (Caliber)/LVS/DFM/EM for the above cells with prominence to pin accessibility, Cell area minimization, minimizing higher metal routing.

Personal Details ________________________________________________

Name : Riyaz Shaik

Date for birth : 08-04-1986

Nationality : Indian

Languages known : Hindi,Urdu,Telugu,Kannada,English

ParmanetAdress : D.NO:15-16-95,

Vasavinagar 4th line,

Kakani Road,

Guntur (Dt).

Andhra Pradesh.

Date : 27-1-2011

Plac:GUNTUR (Riyaz Shaik)

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