Engineer Project

Mail:*******.***************@*****.***

Mob:+91-916*******

SRIDEVI CHEEPURUPALLI

Summary:

Seeking a career in an I.T organization to increase my knowledge. And to work in an innovative and competitive environment.

Technical summary:

M.Tech 2012 pass out in communication systems (DSP and Embedded as specialization)

2.2 years of past work experience in Firmware Design and Development, System Analysis, Verification, Validation in Embedded systems.

Experience in C Programming on 8/16/32-bit Micro controller architectures like ARM7, 8051 and using their respective IDE tools.

Education

Course Institution Board/ University Major and Specialization Percent Year

M.Tech S.V.P College of

Engineering, Visakhapatnam Andhra University Communication Systems Pursuing

8.4 in first year 2012

M.Sc College of Science and technology,

AU Campus, Visakhapatnam Andhra University Electronics 76 2007

B.Sc Sathavahana college

Vijayawada Nagarjuna

University Electronics 80 2005

Inter Nalanda Junior College,

Vijayawada AP Interstate Board Maths, Physics,

Chemistry(MPC) 85.60 2002

SSC Railway

Mixed high school,

Vijayawada AP State Board AP State board Syllabus 80.30

2000

Technical Skills

Architectures : ARM, 8051.

Controllers : ARM7-NXP LPC2368/78(32-bit), C805120 (8-bit)

Compilers : Keil

Environments : Keil UVision IDE

EDA packages : ORCAD

Display Interfaces : LCD and LED

User Interfaces : Keypad

Programming Language : Embedded C, Mat lab

Operating Systems : Windows XP.

Functional Skills

Expertise in Firmware Design and development using 'C' language for various 8-bit and 32-bit Micro controllers.

Exposure to Board level debugging using Logic analyzer and Oscilloscope etc.

Expertise in Firmware design and development for 8/32-bit Micro controllers.

Hands-on in Control card design and board bring up.

Project Work (M.Tech)

Title:

” IMPLEMENTATION OF ADAPTIVE CHANNEL EQUALIZERS USING VARIANTS OF LMS”.

ABSTRACT :

From past to till date, inter-symbol interferences have a serious impact on quality of signal transmission in the communication system of digital baseband. The techniques of adaptive channel equalization are used to eliminate or reduce inter-symbol interference. Channel equalization is one of the applications of adaptive filtering. The work includes an efficient approach to compare the Adaptive equalizers with variants of LMS algorithm for the removal of noise in the corrupted signals. The LMS algorithm is chosen for MAT LAB programming to compare its variants in this paper. Here output of the model is compared for LMS algorithm, NLMS, Complex NLMS and NLMSSIGN algorithm. It has been observed that signal to noise ratio has been increased considerably.

Professional Experience

Organization Role Dates

Verus Solutions Private Limited Embedded Engineer June 2007 to Aug 2009

Project details :

Project FSK Modem

Description FSK modem is designed to send the text data in LOS(100-200MHz) mode at 1200bps data rate in point to point communication. Text data will be received from Application to the Modem and will convert this digital data into Analog form using FSK technique.

Responsibilities As a Project Engineer I was responsible for:

Hardware schematic design by using orcad tool.

Preparation of Firmware Requirement & Interface Requirement Specification Document.

Preparation of the PDF (Product Development File).

Developing Firmware and tesing for the following:

• Serial Protocol implementation from PC to Modem

• Preparing the design and maintenance manuals.

• Driver for data handling and processing.

Project Remote Control Unit

Description Remote Control Unit is used by the user to control and monitor the RF Radio from remote locations. All voice and data signals from RF Radio are extended to Remote Control Unit through balanced transmission lines. Remote Control Unit is the extension of RF Radio Front Panel at remote locations. Audio Signals are extended to remote locations through 600 ohms balanced interface.

Responsibilities As a Project Engineer I was responsible for:

Hardware Schematic design by using orcad tool.

Hands on experience Audio Designing.

Preparation of Firmware Requirement & Interface Requirement Specification Document.

Preparation of the PDF (Product Development File).

Developing Firmware and tesing for the following :

• Remote driver for accessing RF Radiol through RS422 Physical Channel Interface.

• Driver for LCD and Matrix Keypad.

• Driver for Data Transceiver through RS232 Physical channel.

Project RADAR Transceiver System

Description The RADAR Transceiver system operates in frequency of 30MHz which generates a beam pattern with a power output of 1kW and is intended for analyzing the IONOSPHER layer characteristics. Main subsystems of the Transceiver system are Radar controller (RC), Master timing & control signal generator (MTCSG), Exciter, RF distribution & switching unit (RFDSU), TR modules and five channels receiver unit. Radar 360 degree scanning is done through programmable phase shifters. RC allows the user to set the experimental parameters like pulse width (PW), inter pulse period (IPP), code flag (code/uncoded), baud length, code length no. of beams (NB), beam sequence, no of cycles (NCYCLES) etc. The RC controls the subsystems of TR system and generates the timing and control signals required for setting the above experimental parameters. The RC communicates with all subsystems through Ethernet interface at 10Mbps.

Based on data received from RC, the MTCSG generates a inter pulse period (IPP) to all TR modules & digital receiver. It also generates & detects various controls to exciter unit, RF distributing & switching unit and five channel receiver unit with respect to IPP. It also controls the calibration unit and the Exciter (TTL levels). Exciter generates a pulsed RF signal, whose width can be varied from 0.5µs to 500µs. The pulsed RF signal is uncoded /bi-phase coded with BPSK modulator. The pulsed RF signal generated is distributed and fed to TR modules.

Responsibilities As a Project Engineer I was responsible for :

Hardware schematic design by using Orcad tool.

Preparation of Firmware Requirement & Interface Requirement Specification Document.

Preparation of System level flow chart for firmware.

Developing the Firmware and tesing for the following:

• Protocol development for communicating the different subsystems from Radar controller.

• Driver for data trans reception and executing the time critical parameters like Pulse width, Inter pulse period.

• PWM driver for generation of Pulse width and inter pulse period(0.5 to 500usec).

Achievements

Presented a paper in National level conference “Advances in Communication, Navigation & Computer Networks” (ACNCN-2012)17th-18th March, 2012 technically co-Sponsored by IEEE HYDERABAD SECTION.

Secured 2nd rank in NU- cet conducted by Nagarjuna University.

Secured 8th rank in AU-cet conducted by Andhra University.

Secured 27th rank in NIIT test at National level.

Participated National level Seminar competitions by Andhra Loyola college.

Participated “National Space Symposium “conducted by Andhra University.

Personal Details

Name as in passport : SRIDEVI CHEEPURUPALLI

Father's Name : APPALA NAIDU CHEEPURUPALLI

Passport Number : G3831704

Date of Issue/Date of Expiry : 29/06/2007 /28/06/2017

Linguistic Ability : English, Telugu and Hindi

Date of Birth : 5th July 1984

Marital status : Married

Contact Telephone : 91-916*******

Permanent address : P.NO: 63, Sri Satya Enclave, Near Suraksha Colony

Sridevi Theatre Road, Chanda Nagar, Hyderabad.

Pin: 500050, Andhra Pradesh, India

Mob: +91-916*******

Email ID : *******.***************@*****.***

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