VLSI Design Engineer

VARUN SHAH

*** *. ******* ****** #** • San Jose, CA 95112 • 408-***-**** • ***********@*****.**.**

OBJECTIVE:

Obtain a responsible and challenging job in Analog and Mixed Signal IC Design at a growth-oriented company.

TECHNICAL SKILLS SUMMARY:

CAD Tools: CADENCE (VIRTUOSO Schematic, ADE (L, XL), Layout, SPECTRE-S), HSPICE, Awaves, ModelSim, IC Manage for CADENCE, Calibre for CADENCE, Synopsys Design Compiler.

Designing skills: Analog circuit design, Digital system and circuit design, Mixed-signal circuit design.

Software/Lang: Verilog HDL, C, C++, PERL Scripting, Windows, Linux, Macintosh, MS Office.

EDUCATION:

MS, Electrical Engineering, San Jose State University, Major GPA-3.94/4.0 (Dec ‘09)

BS, Electronics Engineering, University of Mumbai, Mumbai, India, GPA - 3.7/4.0 (Jul ‘06)

GRADUATE COURSE WORK:

Analog IC Design

Mixed Signal IC Design

High Speed CMOS IC Design

Semiconductor Devices Advanced Digital IC Design

ASIC CMOS Design

IC Fabrication

Digital System Design

Linear Systems

ACADEMIC PROJECTS:

MS Project: Jan 2009 – Dec 2009

Frequency Synthesizer:

Implemented a Frequency Synthesizer to generate frequencies in range of 300 MHz to 1 GHz from a reference frequency of 10 MHz using CADENCE Tools in TSMC 0.18um technology.

Graduate Level Projects:

Mixed Signal IC Design, Advanced Digital IC Design, Analog IC Design Jan 2008 – Dec 2009

(Design, Simulation and Layout using CADENCE Tools)

• 24-bit Full Adder using Carry Look Ahead Logic design in IBM 0.13um technology.

• 7-bit Current Steering Digital to Analog Converter (DAC) in TSMC 0.25um technology.

• Folded Cascode Differential Amplifier with full swing input and output in IBM 0.13um technology

• 32-bit Booth Multiplier (at 4 GHz and 3 phase - High Speed Dynamic CMOS Logic) in IBM 0.13um

• 8 - Bit ALU using Kogge Stone Adder in AMI06 technology.

Digital System Design

• Data Slicer design in Verilog HDL using MODELSim Student Version.

• 4-by-4 Keypad Scanner and Encoder design in Verilog HDL.

Wafer Fabrication and Testing

• Designed, fabricated and tested diodes, NMOS transistors, super MOS transistors and current mirrors.

• MOS transistor design using Gm/Id methodology (High gain, low frequency), designed the device

parameters using Sentaurus TCAD and fabricated using 4-Mask process.

WORK EXPERIENCE:

Apple, Inc. • Cupertino, CA Oct 2008 – May 2009

Layout Design Engineer

• Worked closely with circuit design engineers to create layouts of standard cells and mega cells for digital, analog, and mixed signal design circuits.

• Created, reviewed, and updated documentation for std-cell and mega-cell rules used for layouts.

• Created .gds files in different layer mappings for foundry.

• Created top-level power routing in mega-cell layout for Integration Team.

• Fix LVS & DRC issues for layout cells that had edits in the schematics.

• Wrote scripts in Perl for automation of streaming in and streaming out .gds files.

WORK EXPERIENCE: (CONTINUED)

San Jose State University • San Jose, CA Sep 2009 – Dec 2009

Student Assistant for Linear Systems

• Assist Professor in teaching students and grading assignments/exams and conducting exams.

• Conduct extra lectures to solve student problems/concerns with subject matter.

Real Time Systems • Mumbai, India Nov 2006 – Mar 2007

Engineering Assistant

• Assisted Senior Officer with various engineering projects.

• Worked on Quartus II software for Altera Cyclone 2 FPGA.

• Interfaced the Altera Cyclone 2 FPGA with keyboard and monitor.

OTHER COMMUNICATION AND INTER-PERSONAL SKILLS:

• Able to work effectively both independently and collaboratively in fast-paced environments to complete assigned tasks while adhering to strict deadlines and specifications.

• Exceptional interpersonal and communication skills to build rapport and strong relationships with customers, colleagues, and superiors.

• Excel at analyzing complex problems while leveraging practical knowledge and scientific principles to devise appropriate solutions.

• Quickly master and enjoy learning new technologies, methodologies, and responsibilities.

• Highly motivated, results-oriented, team player with proven record of achieving excellent results.

REFERENCES:

On Request

Contact this candidate