embedded engineer

SHACHI AGARWAL

******.*******@****.***.***

*** ***** *** ******, *** 110, Arlington, Texas, 76010

Daytime Telephone: 860-***-**** * Home Telephone: 860-***-****

SUMMARY OF QUALIFICATIONS

• A year of Post and Pre silicon validation experience for Texas Instruments.

• University topper in first year Undergraduate, MIT, Manipal.

• Achieved “Feather in my Cap” for my valuable contribution to the project in Wipro Technologies.

• Awarded ‘Graduate research assistant’ for a year in silicon IC fabrication lab at UT, Arlington.

CORE COMPETENCIES

Pre/Post-silicon validation • Embedded • Code composer tool • Automation • Database Management tool • Software/Hardware debugging • Test plan development • Test case Execution • Perl scripting • C programming • Radio frequency design • Microprocessor design • ADS simulation • System level design • Wireless technology • Team player • Quick learner • Self Starter

EDUCATION

Master of Science, Electrical Engineering 3.58/4.0

University of Texas at Arlington Graduation: 05/09

Bachelor of Electrical Engineering 3.57/4.0

Manipal University, India Graduation: 05/05

WORK EXPERIENCE

Validation Engineer /Project Engineer Wipro Technologies, India Oct. 2005-July2007

Worked as Project Engineer for AEC(Advanced Embedded Controllers) division of PES (Product Engineering services) group at Wipro Technologies, Bangalore, with Texas Instruments as Client.

Responsibilities:

Performing Pre-Silicon verification of ARM7TDMI based automotive SoC on Zero Bug (ZeBu) platform (FPGA based Pre-silicon verification tool) and also Post silicon Validation.

Development of chip support libraries (Low level drivers) for verification of system-modules and peripherals.

Development of Validation Plans for system level modules as well as Peripherals.

Accomplishments:

• Attained in depth knowledge on TI(Texas Instruments)TMS470 architecture for AEC group(Advanced

Embedded Controllers) which are targeted for Automotive sector.

• Gained extensive knowledge of modules like DMA, CAN, RTC and RAM.

• Identified and developed test cases in C and ARM for modules like DMA, CAN, RAM Wrapper with ECC(error correcting code), RTC, CRC, Flash.

• Developed Validation Plans for system level modules like RAM Wrapper and RTC.

• Attained excellent knowledge of debugger tools like Code Composer studio and Rational ClearCase Configuration Management tool as well as XDS560 JTAG Emulator and Signum.

TECHNICAL SKILLS

Languages: C, Assembly Language (8086, 8085), VHDL, Verilog, PERL

Softwares: Labview, Clearcase, Code Composer, PSpice, Matlab, Cadence, ADS

Application software: MS Office Platforms: Windows XP/2000/98, DOS, UNIX

RELATED COURSE WORK

Analog CMOS IC Design Wireless Communications Microprocessors

CMOS RFIC Design Digital Communications Advanced Microprocessors

VLSI Design Digital Signal Processing Embedded Systems

Radio Frequency circuit design Digital Electronics Microwave System Engineering

PROJECT WORKS

LNA Design using large signal spice model Spring ‘09

Designed a Low noise Amplifier using ADS. Performed biasing point measurement, stabilized the circuit using S-parameters, impedance matched for maximum power transfer, determined the noise figure and performing harmonic balance analysis.

Cache Controller Design Fall ‘08

Determined the best architecture for a 256kB cache controller which interfaces to a 4GB 32-bit signal processing microprocessor based on type (set-associative or direct mapped), n-way (if set-assoc), number of cache lines, block size, and write strategy (write-back or write-through). Analysis for best architecture was based on total access time to run the FFT routine and AMAT.

RS-485 based bidirectional communication system Fall ‘08

Implemented and tested hardware for RS-485 based bidirectional communications system between a PC and one or more slave controllers. Worked on two separate circuits -- a RS-232 to 4-wire RS-485 converter and a 4-wire RS-485 transceiver and programmed it to demonstrate various waveforms like square, triangle, sawtooth, piecewise and pulse and also Tri color LED, motor, as well as speaker.

Design of a 5-stage pipeline Harvard Architecture Microprocessor Fall ‘08

Designed a 32 bit, 5 stage pipelined microprocessor with 4GB of data and program memory to remove data, control and structural hazards. Architecture supports 32 registers with sub-referencing of LSB, LSW and 32 bit instructions.

PCM Audio Codec Design Summer ‘08

Designed a PCM audio codec that samples 8/16-bit monaural data from one of the two line-level audio sources and generates a monaural line-level audio output using a DMA interfaced to the 8086 system in maximum-mode. The audio gain, source, frequency cutoff, sampling rate, and sampling size are all programmable through I/O-mapped registers.

Design of Wireless receiver for MRI system Summer ‘08

Designed a wireless receiver to reproduce a weak MRI signal. MRI signal was transmitted by multiple up conversions, using Passive mixers, to higher frequency and the receiver down converted it to a specific IF frequency. Designed LNA (Low Noise Amplifier) and Single sided Mixer for MRI signals to make the whole system more immune to noise and provide adequate gain.

Comparator Design Spring ‘08

Designed and performed Post-layout and Pre-layout simulation for a high speed and low power consumption MOS comparator in CADENCE to meet the given specifications.

Design of a 1.92GHz Gilbert Cell Mixer Spring ‘08

Implemented MOS, Gilbert Cell Down converting mixer for 1.92 GHz GSM systems and performed post layout and pre layout simulations for Noise Figure, 1dB compression point, 3rd order input intercept point(IIP3) and conversion gain in CADENCE.

Metric of Tagged object Fall ‘07

Developed and tested a metric (value) that signifies performance of a RFID tag on a particular object taking frequency, power and orientation as main parameters. The testing was done using SIRIT infinity RFID reader, Squiggle and bow-tie tag.

Event Information System Using GSM Mobile Phones Jan ‘05-May ‘05

Built a surveillance device using Microcontroller 8051, sensors, Rs-32, ADC, Comparator, LCD which sends SMS to any GSM mobile on detecting a change in temperature. Designed the whole system and programmed it using Embedded C and VHDL. The project involved both hardware and software and was awarded second prize.

PROFESSIONAL ACTIVITIES and AWARDS

• HAZCOM certification achieved.

• Project “Event Information System Using GSM Mobile Phones” was awarded second prize.

• Participated as a member of SWE (Society of women engineer), ISTE (Indian Society for Technical Education) and IE (Institution of Engineers), NSBE(National society of Black Engineers).

• Attained “IBM Clearcase for UNIX” certification.

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