Product Engineer

Jinying Lu

**** ******* **

San Jose, CA ****2

*********@*****.***

408-***-**** begin_of_the_skype_highlighting              408-***-****      end_of_the_skype_highlighting

EDUCATION

M.S. in Electrical Engineering: 01/08-05/10

San José State University, San José, CA (GPA:3.75/4.0)

Master Project: A 5GHz PLL Frequency Synthesizer using 45nm CMOS Technology

B.E. in Electromechanical Integrated Engineering: 09/98-07/02

Shanghai Jiao Tong University, Shanghai, China (GPA:3.5/4.0)

PROJECTS

 PLL Frequency Synthesizer Design: Design a frequency synthesizer for 5 GHz Wireless Local Area Network (WLAN) applications. It was implemented in 45nm technology. The design included a Ring VCO, Loop filter, Charge Pump, Phase Detector and Programmable Divider. Schematic and simulation using Cadence IC 5.0.

 CMOS Pipeline ADC design: Design a high speed pipe line ADC using Op Amps, switches, sample and hold, DAC. Schematic, Simulation, and Layout, using Cadence IC 5.0.

 32 bit 2GHz floating point comparator: Designed a high speed dynamic CMOS circuit and implemented with 0.13um CMOS technology to compare 2 floating point numbers using Cadence IC 5.0

 6 bit Flash A/D Converter: Designed an A/D Converter operating at 500MHz, implemented with 90nm technology. This included Op Amps, Sample-and-Hold circuit, latched comparator.

WORK EXPERIENCE

San Jose State University, San José, CA 09/08-12/08

Lab Instructor – Digital Logic Design Laboratory

 Assisted students with BCD counter design and its hardwiring on PCB boards

 Assisted students with the design and demo of HEX counter using Spartan-3 FPGA boards

 Assisted students with the design of traffic light controller using Xilinx ISE tools

 Delivered in-lab lectures on a variety of relevant topics

Philips Lighting Electronics Co., LTD, Shanghai, China 07/02-12/04

Product Development Engineer

 Acted as project leader through product development cycle

 Trouble shooting process problems by using DOE approach. Increased the production yield by 20%.

 Supervised, updated technical documents

 Created and maintained project schedules

SKILLS

 EDA tools: Xilinx ISE, Synopsys VCS, Matlab, Spice, AutoCAD,

Cadence IC 5.0 (Schematic Editor, Layout Editor, Spectre, Analog Environment)

 RTL Design: Verilog

 Programming Language: C, C++, Perl

 Lab Tools: Oscilloscopes, Digital Multimeter, Thermometers

 Good knowledge of statistic concepts & tools (JMP, SAS, Minitab)

 Operating Systems: Windows , UNIX

 Language: Proficient in both English and Mandarin, Conversational in Cantonese

RELEVANT COURSEWORK

ASIC CMOS Design

Introduction to Large Scale MOS Design

High Speed CMOS Digital Integrated Circuits

Analog Integrated Circuits

Principles of Semiconductor Devices

Applied Engineering Statistics

Statistical Quality Control

REFERENCES

Available on request

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