Project Sales

JOHN J.E JOO

*** ********* ***, *** ****, CA ● 408-***-**** ●********@*****.***

CAREER OBJECTIVE

To obtain a challenging position that will enable me to utilize my prior experiences in Product marketing Management, System Architects, Engineering Management and Program Management

SUMMARY OF QUALIFICATIONS

• 15 years’ experience in systems environments, including strong technical expertise in in developing design of RF, analog and digital circuits(FPGA) at the board level and managing effective programs.

• Excellent communication skills (written and verbal) with strong track record in technical customer interface and supports.

• Highly energetic and self-motivated individual with a strong track record of leadership, and commitment to meeting deadlines under tight pressure situations.

• Ability to lead and inspire a team of talented senior and junior engineers and having deep knowledge of product development life cycle including front end design, and backend product delivery into manufacturing.

• Not be afraid to take risks, and think out of the box and ability to manage budgets, and tight schedules. Recruit talented engineers into the team, retain them.

• Ability to interface with other disciplines, including software, mechanical and signal integrity. Has demonstrated experience with shipping products from concept to manufacturing, and sustaining

• Extensive hands-on experience in OEM operations

• Effective working alone and as a cooperative team member

• Motivated and enthusiastic about developing good relations with people at all levels

PROFESSIONAL EXPERIENCE

VeEX INC 2008 - 2011

Director Product Marketing Manager

• Handheld & Portable Transport, Metro Ethernet& Back Haul /Fiber Channel, Wireless (WiMAX/WCDMA/GSM/UMTS) and SyncE/IEEE1588 Project management and engineering teams in developing sales strategies

• Technical supports for direct customers and Sales teams

• Respond to customers, sales representatives and distributor’s inquiries via telephone, online networks, and email.

• Help in diagnosing, troubleshooting, and debugging

• Designed promotional materials to increase sales

• Defined products and solutions including MRDs, PRDs and Roadmaps.

• Developed cross marketing promotions.

• Worked closely with application teams for collateral such as application notes, data sheets, evaluation kits, platform data sheets, demo units as well as field training for Sales and FAEs.

• Simultaneously managed multiple projects under tight deadlines.

Achievements:

• Proposed portable Triple Play product which combined Transport (OTN/SONET/SDH/PDH), Metro Ethernet and Fiber Channel. Successfully lead cross-functional team responsible for large, complex initiatives to develop & implement marketing strategy for Transport & Metro Ethernet/Fiber Channel equipment resulting in 150% of $15M revenue objective

• Lunched OEM product: 3G/4G Wireless (WiMAX/WCDMA/GSM/UMTS) VSA product developed with OEM vendor – successfully demo with Sprint, Clear Wire and Time Warner Cable and lunched product to market result in $2M revenue objective

• Proposed portable Synchronous SyncE/IEEE1588 PTP product - Successfully lead cross-functional team for combine existing two different PDH and Ethernet product function to implement SyncE/IEEE 1588 PTP that reduced development time and resource, and successfully lunched within 6 months from product proposal.

SUNRISE TELECOM INC 1994 - 2008

Director Engineering

• Direct and manage project development from beginning to end.

• Defined project scope, goals and deliverables that support business goals in collaboration with senior management.

• Developed full-scale project plans and associated communications documents.

• Estimated the resources and participants needed to achieve project goals.

• Determined and access need for additional staff and/or consultants and make the appropriate recruitment if necessary during project cycle.

• Identified and solved issues and conflicts within the project team.

• Planed and managed project timelines and milestones using appropriate tools.

• Developed and delivered project reports, proposals, requirements documentation, and presentations.

• Coached, mentored, motivated and supervised project team members and contractors, and influence them to take positive action and accountability for their assigned work.

• Designed experience of 64-bit and 32-bit industry standard processors including MIPS, x86 and PowerPC.

• Designed experience of complex next generation - multiple Gigabit throughput networking system boards

• Experience managing a team of board and FPGA designers using - Xilinix Virtex, and Altera Stratix

• Design experience of high speed digital circuits, high-speed backplanes and analog circuits

• Design knowledge of OTU-1/2/3, OC-192/OC-768, DWDM, HDSL, T1/E1, T3, Ethernet,

ATM, SONET, electro-optics and computer peripherals.

• Knowledge and experience in Switch/SAN/NAS, IP, ATM and SONET based fault tolerant switching

systems

• Knowledge of system level buses like PCI-E, DDR2, SPI-3, POS-PHY Level 3, Hyper Transport

• Knowledge and experience of high speed clock, noise and EMI , Board bring-up

• Experienced in 18 engineers hiring (from Korea) and training.

Achievements :

- 40G/43G SONET/SDH/OTN project. Assigned and brought the design team to study 40G technology that recommended right technology to team and brought the outsourcing team to supported Signal Integration of PCB and Layout. Successfully lunched product to market result in $5M revenue objective

- Next generation handheld platform design, include Industrial & mechanical design, Battery pack(12-cell Li-ion) design and Processor board( Marvell PXA320) design in addition Thermal simulation for new platform and efficient heat sink module design.

Successfully lunched product to market result in $20M revenue objective

- Next generation Metro Ethernet & Back Haul (10GE LAN/WAN, 1GE and 10/100/1000BT)/Fiber Channel (1/2/4G, 10G) project. The board designed using XFP, SFP and three Altera Stratix III FPGAs and AMCC 405Ex processor. Work with IP core vendor to provide 10GE MAC/PCS/WIS and 10G FC-1/FC-2 cores. Successfully lunched product to market result in $10M revenue objective

- MTT-30Z 1G/2G/4G fiber channel project. Used XC4VFX60 FPGA and Micrel Clock synthesizer for V4 reference clock. Designed and verified MGT function in FPGA side. Successfully lunched product to market result in $2M revenue objective

- STT-Meteo 8 Port Ethernet module project. Main functions are Bert, RFC 2544, IP Test, Loopback and Monitor. The main architect design is flexible/configurable 8 port design which architects two daughter board and main board concept. The daughter board used XCV4FX20 and

Motorola MPC875 processor and 2 SFP and dual RJ-45. The Main board used 8 Stratix II EP2S60 FPGA. Successfully lunched product to market result in $15M revenue objective

- STT-ONE/A NGN SDH/SONET/PDH project. The major design difficulty portion was VCAT/LCAS and GFP IP core design, so worked with two outside consulting team which Paxonet located in India and XDS (Xilinx Design Service). Successfully lunched product to market result in $15M revenue objective

TAEHAN ELECTRONICS WIRE CO, LTD 1988 - 1994

Project Hardware Engineer/Manager

• T1 & T3 ASIC design using LSI logic technology and board development

• MX13 overall system design, including specifications and H/W boards design

• Six types of high speed boards for FT3C system

• PCM32T overall system, including specification and H/W boards using Xilinix XC3000 series.

¬¬EDUCATION

Chung-Ang University, Seoul, Korea

BS Major in Electronics Engineering, 1987

TECHNICAL SKILLS

Transport Protocol: OTN (OTU-1/2/3, OTU-1e/2e/3e), SDH (STM-0/1/4/16/64/256), SONET (OC-3/12/48/192/768), PDH(T1/T3/E1/E2/E3/E4).

Wireless Technology: WiMAX/WCDMA/GSM/UMTS

Software Network Protocols: VoIP, TCP/IP, UDP, VLAN, VPN, HTML

Hardware Network Protocols: Ethernet LAN/WAN (copper and fiber), Fiber Channel, FCoE, SAN/NAS, ATM.

Interface: SFI-5, SFI-4, 12C, LVDS, LVPECL, CML.

Synthesis: Altera’s Quartus II, Xilinix’s ISE, Synplocity’s SynplifyPro.

FPGA: Xilinix Virtex, and Altera Stratix.

Schematic: Cadence/Allegro (OrCAD Capture)

Simulation: Mentor’s ModelSim, Viewsim, and Hyperlynx.

Microsoft Office: PowerPoint, Excel, Word, Visio

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