Rizwana Begum

Email: qetfb7@r.postjobfree.com; Cell: 215-***-****; West Chester, PA

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Objective: To design, develop and implement solutions in embedded systems.

Achievements:

Graduate GPA 3.96

Received performance excellence awards twice in Qualcomm Inc.

Received 4 year full academic scholarship for Bachelor of Engineering

Honour Student, Gold Medallist in 12th Grade

State Topper, Gold Medallist in 10th Grade

Work Experience:

Qualcomm Inc., India- Embedded Engineer 2 - Jan 2008-April 2010

Developed and debugged embedded C video code for ARM processor while bringing up new projects on Qualcomm chipsets and trouble-shooting customer issues

Developed, tested and supported various video modules of standard codecs (MPEG4, H264) for Qualcomm DSP processors in assembly language in RTOS environment

Experience with full software life cycle of project development: Project requirements gathering, design reviews, code development, code reviews, test suit reviews, test coverage issues etc.

Experience with unit testing and integration testing of the software written in assembly and C languages.

Worked with Qualcomm proprietary embedded operating system BREW (Binary runtime environment for wireless)

Have technical knowledge of embedded Linux operating system

Developed BIOS (Basic Input / Output system) for a DSP chipset for a major project involving video and audio decoders and encoders

Have experience working with boot loaders, core BSPs (Board support packages), interrupt handling routines, memory allocations, cache optimizations, threads scheduling and prioritization etc.

Developed interface code to communicate with video hardware block from DSP to send/receive commands and data

Profiled various project requirements in the project decision stage, like the memory requirements, MIPS requirements, HW utilization changes, bus traffic impact, processing time (hence video fps) impact using timers, etc., using ETM (Embedded Trace Macrocell) for ARM microprocessor, and Qualcomm proprietary tools for DSP

Got hands on experience with JTAGs, Trace32, using hardware counters etc., during HW testing and development

Analyzed and optimized the video playback and recording power consumption

Studied video hardware schematics, chipset design documents to know various power rails coming out of (PMIC), various buses etc. and proposed two major chip level power optimizations for future chipsets of Qualcomm- reducing bus clock frequency & optimizing video hardware cycles

Developed scripts in TCL language to simulate concurrent video applications for Qualcomm chipsets. Simulation was done using Qualcomm proprietary tools

Developed technical support documentations for legacy video decoder code algorithms, new project designs and code

Took initiative in learning video decoder implementation on Qualcomm chipsets, H264 video codec standard and gave presentations to the team as a self development activity

Accenture, India- Intern- May 2006 – July 2006

Designed and developed a greeting card website

Graduate Research Projects:

Have done courses on parallel programming and high performance computing which required extensive programming in C for a multi-core processor in Linux environment. Developed Perl scripts to automate the code execution

Implemented and tested various VHDL designs on Spartan-3 board using Xilinx ISE. Worked on XMIT, SRAM interfacing using hyper terminal, floating point arithmetic using coregen, FIFO using SRAM

Implemented and tested the DMA controller VHDL design provided by opencores.org. During the process, hands on experience with Synopsys Design Compiler, VCS and SoC debugging and verification

Assisted my professor in research work - Automatic Power Model Generation for Mobile and Datacenter Computing

o Developed hierarchal power model of a generic computing device (e.g.: mobile phone, laptop, PDAs etc.) in cross platform XML language.

o Developed an automated logger for logging the power consumption and the current state of an android device using Eclipse platform in java using object oriented style

Evaluated power and performance gains using temporary file system ‘tmpfs’ along with traditional file system (hard disks and DRAM) in general purpose computers and web servers

Discussed , debated and summarized 35 computer architecture IEEE conference papers

Have done courses on digital logic design, submicron IC design, power aware computer architecture, parallel computer architecture etc.

Have done a course on 8051 microcontroller design and interfacing

Have done courses on computer networking basics that covered basics of TCP/IP and other networking layers protocols

Education:

Master’s in Computer Engineering, Drexel Univ., Philadelphia, PA- March, 2012. Current GPA – 3.96

Bachelor’s in Engineering, BITS Pilani, India- May, 2008, GPA 3.8

12th Grade, India, May 2004, 98.2 percent

Technical Skills:

Languages: C, C++, J2ME, Android, VHDL, embedded C, Assembly language, perl, Tcl

Programming tools: Net Beans 5.5, pSpice, Xilinx ISE, ModelSim, Matlab, Eclipse IDE, Synopsys (Design Compiler)

Chipsets: 8051 microcontroller, ARM9 and ARM11, Qualcomm chipsets, Xilinx Spartan3 starter kit(FPGA), ODROID-S (android platform)

Operating Systems: Windows, Linux, RTOS (Qualcomm chipsets)

Soft Skills:

Excellent working relations with management and co-workers

Excellent communication skills

Fast learner and have ability to multi-task

Demonstrated a great potential to analyze the problem and arrive at an optimal solution

Adaptive to new challenges and situations without hesitation

Proven commitment to high quality and in-time results

Organized in working and have a receptive mindset

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