Post Job Free
Sign in

Electrical Engineer

Location:
Chicago, IL
Posted:
January 10, 2011

Contact this candidate

Resume:

PUSHYAK KALKUNTE

Tel: 312-***-****

Email: *******@***.***

Profile

-Seeking a suitable Electrical Engineering design/test position in the semiconductor industry.

-Interests are Digital CMOS Design; ASIC/FPGA Design; Analog/Mixed-Signal & RF Microelectronics; Embedded Systems

Course Work

Advanced VLSI Design, Analog & Mixed Signal VLSI, Introduction to VLSI, Testing and Reliability for Digital Systems. Advanced Computer Architecture, RF Communication Circuits, High-Performance Processors & Systems, Digital Systems Design, Embedded systems design, Analog & Digital Communication, Wireless Communication

Education

Master of Science, Electrical and Computer Engineering, December 2010

University of Illinois at Chicago, GPA: 3.50

Research: CMOS based millimeter-wave wireless transceiver designs

Bachelor of Engineering, Electronics and Communication, May 2008

Visveswaraiah Technological University, India, GPA: 3.75

Project: TCP/IP based LAN multi-peripheral embedded controller design

Technical Skills

Languages: VHDL, VERILOG, LabVIEW, C, C++, Embedded C, Perl, Shell Scripting, MATLAB, HTML

Design Tools: CADENCE tools - VirTuoso, SimVision, Spectre; HSPICE, PSPICE, QUARTUS II, XILINX ISE, ARM Tool - KEIL, MICROWIND, MODELSIM, RENESAS IDE

Certification: Certified LabVIEW Associate Developer (CLAD)

Project Experience (August 2008 - Present)

--Universal Four-bit Shift Register with Hold, Left-Shift, Parallel Load & Subtraction Operations:

-Designed a 4-bit shift register with 0.17mm2 area & 0.15 ns delay in the standard 0.25 micron CMOS process

-Used CADENCE tools - VIRTUOSO, SPECTRE for the logic-level and layout design and simulation

--One-Way Bridge Traffic-Light Controller:

-Programmed controller for uni-directional traffic on a bridge; signal time adaptive to traffic flow density

-Developed behavioral model for controller using VERILOG and simulated on QUARTUS II design tool

--Super-heterodyne Broadcast-band AM Receiver:

-Designed and built Audio, Mixer, PLL and output stages of an optimal low power RF receiver

-Hands-on experience - soldering, circuit assembly, testing with oscilloscopes and PSPICE simulations

--Research on Millimeter-wave CMOS Wireless Transceiver Design Trends:

-Enumerated popular designs for mm-wave transceiver building blocks - antenna, mixer, oscillator, amplifier etc.

-Working on developing a Simulation based modeling methodology for higher design and layout flexibility

--Modified Alternating Run Length - Huffman Coding for Test Data Compression:

-Implemented a modification of the RL-Huffman Coding Algorithm for maximal test data compression using C++

-Generated test patterns for ISCAS benchmarks had 70% compression, with 5-10% improved compression ratio

--TCP/IP based LAN Multi-Peripheral Controller:

-Designed a controller block with micro-controller to drive 4 relays, 1 LCD, 4 IOs & a buzzer to access peripherals

-Programmed microcontroller M16C28 for data communication using embedded C in the RENESAS IDE.

--HSPICE LAB: Characteristics Analysis of Different types of Filters

-Determined optimum values for resistances and capacitances in Sallen and Key II order filter

-Extensive net-list coding experience inclusive of dc/ac sweep and trans commands

Work Experience

Summer Intern - SM Electronics, Bangalore, India (June 2008 - August 2008)

--FPGA-based Enhanced Quad UART (Universal Asynchronous Receiver and Transmitter) design:

-Quad UART RTL synthesized from 4 instances of single UART channel with transmitter, receiver and control unit

-XILINX ISE used for VHDL code synthesis, timing analysis and design simulation of the 4 UART channels

--Graduate Research Assistant: University of Illinois at Chicago (August 2008 - Present)

-Assist with psychiatric research: literature survey, grant/ poster/ manuscript preparations using MS Office

-Maintain databases using MS Excel, MS Access and analyze statistical significance & power using SPSS



Contact this candidate