Engineer

SCOTT E. WALTON

** **** **** **** • MERTZTOWN, PA 19539 pk9a0v@r.postjobfree.com

CELL: 717-***-**** http://www.linkedin.com/in/sewalton

BACKGROUND SUMMARY

Senior Test Development Engineer with extensive experience in test program and hardware development to test high speed, high pin count ICs (integrated circuits) in the semiconductor industry. Also possess experience as a Systems Test Engineer and Systems Applications Engineer with emphasis on network adapters, as well as a Computer Systems Analyst with experience in Network Administration and computer hardware / software upgrades. Equally adept at working independently, or as a team player, and interfacing well with customers. Strengths include:

• Analytical skills

• Detail-oriented • Problem solving and debugging skills

• Flexibility/Adaptability • Values and Ethics

• Persistent

TECHNICAL SKILLS

UNIX, Linux, Windows, Windows Server, MVS & VM Mainframe OS, Novell NetWare, TCP/IP Networking Setup and Test, Network Associates Sniffer Pro, IBM S390 Mainframe Enterprise Server, Microsoft WHQL Testing, HP/Agilent/Verigy 83K/93K ATE (Automatic Test Equipment), TSK UF200, and UF3000 Wafer Probers, Mixed Signal Platforms (Teradyne Catalyst/Tiger ATE), C/C++, MS Office, Visio, Oscilloscopes, TPG, MS FrontPage HTML, Scripts, CPK Analysis, MatLab

PROFESSIONAL EXPERIENCE

LSI CORPORATION, Allentown, PA (Formerly Agere Systems and Lucent Technologies) 2000-2009

Senior Test Development Engineer (Member Technical Staff - MTS) 2005-2009

Developed test programs and designed hardware to test high pin count ICs with high-speed SerDes, CML, and LVDS buffers on multiple test platforms. Resolved design and manufacturability issues by working with Designers and Product Engineers.

• Reduced test time and improved yield by as much as 70% on multiple products for increased revenue.

• Identified a design problem that had been overlooked in 2 previous design reviews, which avoided a significant delay in a key customer product delivery. Received award.

• Co-designed loadboard hardware to run external loopback at 10GHz to increase fault coverage to reduce customer returns.

• Co-developed test methods to Read/Write to a High Density Electrical Fuse (eFuse).

• Established strong rapport and influenced a Test Engineer of a key customer to implement test changes that improved yield by 20%.

• Uncovered Vdd margin issue and isolated issue to be a tracking relationship between the core Vdd and PLL Vdd. Received award.

• Co-authored a technical memo specifying guidelines for design engineers to efficiently design PLL tests for the Agilent/Verigy ATE

Systems Applications Engineer (Member Technical Staff - MTS) 2005

Performed Systems Interoperability Testing - Built Test Beds with different chipsets and operating systems (MS Windows98/2000/XP/2003Server, Linux, and Novell) to test our PCI Express Gigabit Ethernet Device Drivers for 32-Bit and 64-Bit.

• Created Gigabit Ethernet testing lab to identify and resolve possible customer system issues.

• Qualified drivers by performing throughput, functional, and MS WHQL testing to ensure delivery of quality drivers to customers.

• Set up DHCP and PXE Servers to System Test PXE code so that administration can install operating systems over network; reducing complexity and cost when compared to manual installations.

Senior Test Development Engineer (Member Technical Staff - MTS) 2004-2005

• Designed a reduced pin count probe card that saved $14K.

• Negotiated vendor price reductions on loadboards for 30% savings.

• Reduced test time on a product yielding total savings of $28K immediately.

• Designed the first vertical probe card for device with production volume testing.

SCOTT E. WALTON PAGE 2

Test Development Engineer (Member Technical Staff 1 - MTS1)

2000-2004

• Developed test method to log SerDes channel performance for a first of a kind High-Speed SerDes.

• Provided extensive test analysis on product to allow design engineer to address redesign issues.

• Implemented test time reductions and resolved marginal test vector issues on multiple products.

• Met or exceeded intervals keeping delivery of models as close to schedule as design input permitted.

IBM CORPORATION, Poughkeepsie, NY

Systems Test Engineer 1999-2000

Tested all Network interface cards in S390 Enterprise Server; Gigabit Ethernet, Fast Ethernet, ATM, and Token Ring. Partnered with Development and Product Engineering to resolve system problems (dropped packets). Coordinated weekend coverage schedule.

• Aggressively sought out needed on the job training to become productive on S390 Enterprise Server.

• Created/Updated Test and Setup Procedures that benefited whole test team.

• Developed excellent working relationships with Product Engineering and Engineering Systems Test Groups gaining respect and confidence from others in reaching goals by working with and through people.

• Put testing concepts learned into practical use with little or no supervision.

PA DEPARTMENT OF ENVIRONMENTAL PROTECTION, Harrisburg, PA

Computer Systems Analyst 1998

Intern in Bureau of Information Services, Network Administration Department

Assisted with troubleshooting hardware including (Routers, Concentrators, Interfaces, Desktops, Servers, Wiring), writing web pages, installing operating systems on desktops and servers, and supporting a LAN/WAN with a composition of 4,000 to 5,000 desktops and servers.

• Awarded 3-month extension on internship to 6-months, the maximum for a Summer Intern position for being a great asset to the Network Operations Staff.

• Researched and upgraded systems on network for Y2K compliance for flawless, uninterrupted service.

• Designed drawings of the wiring closets to document current configurations and aid in future reconfigurations.

• Analyzed and solved network problems to prevent system down time and maintain user satisfaction.

HERSHEY FOODS, Hershey, PA 1997

Computer Systems Analyst

Intern in Automation & Integration Department - Computer Upgrades on Windows NT / 95 Network - Software and Hardware. Coordinated local training efforts

• Created spreadsheets to track equipment purchases for major hardware upgrade initiative to meet minimum requirements.

• Provided technical support to end-users of desktops and laptops for maximum user uptime and productivity.

• Provided site IT coordinators with supplementary support and procedural instructions to be compliant with corporate policy.

EDUCATION

Masters Engineering, Systems Engineering, Pennsylvania State University, Malvern, PA GPA 4.0 Expected 2011

BS, Electrical Engineering Technology, Pennsylvania State University, Middletown, PA 1998

AAS, Electronics Technology, Pennsylvania College of Technology, Williamsport, PA 1995

Coursework: Intel Microprocessors, Transistor / Op-Amp Theory, Digital Circuit Design, DC/AC Circuit Analysis, Electronic Circuit Design, Pspice for Windows, Assembly Language, Lasers and Opto Electronics, PLC’s, Sensing and Control, Automation and Robotics, Process Control, Simulation and Modeling (MatLab), Wireless Positioning

AFFILIATIONS AND ACTIVITIES

Eagle Scout, Boy Scouts of America

IEEE Student Branch Officer, Web Page Assistant

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