Engineer Process

Lei Jin ***** Vineyard Ln, Saratoga, CA

408-***-**** (M) E-mail: ***.*******@*****.***

Background & Skills:

• Extensive knowledge in R&D and Manufacturing at semiconductor, optical, LCD and MEMs field

• Expert at thin film, material characterization and failure analysis

• Experience in plasma etch, litho, wet etch and thin film deposition process development, process integration, defect reduction and yield improvement

• Knowledge of CMOS,opticle device, MEMs processes flow and device physics.

• Strong hands on, DOE and data analysis skill.

Experiences:

2005-present Neophotonics, Sr. Staff Process Engineer

R&D

• In charge of all the etch processes development (oxide, a-Si, Bosch, metal and quartz) for optical and MEMs devices. Fully hands on experiences on major process and metrology equipments.

• Take major role on device failure analysis. Data analysis, root cause investigation and resolution plan making. Strong hands on experience on SEM, EDAX, AFM and FTIR. Extensive knowledge on other analysis method such as XPS, SIMS, TEM and FIB.

• Successfully transferring new processes to production manufacturing environment. Including new processes set up, document preparation, releasing and tech training.

• Decision maker on purchase new process and metrology tools and facility layout, work closely with venders and outsourcing on onsite FAT, tool set up, qualification, baseline set up and transfer processes. Maintain close relationship with major venders for further support.

• Decision maker on developing new processes with outsource foundries, work closely with foundries on process review, baseline set up, spec and processing match.

• Daily interaction with other module engineers, modify current processes or create new processes to improve Fab yield

Manufacturing and Sustaining

• Sustaining exist processes, trouble shoot for any processes shift and devices function shift according to production SPC chart and devices test results.

• Continuously working on improving process capacity. Maintain and optimize process to improve Cpk.

• SPECs release, update and modification based on condition, process changing and improvement.

• Work closely with maintenance group on hardware failure analysis, resolving major equipment issues, modifying parts and find vendor.

• Work closely with IT person for SPC setup and modification for the new processes and tools.

• Provide continuous technician and new engineer training in fab.

2000-2005 Honeywell Electronic Materials (HEM),

Sr. Process Engineer

• Led Honeywell’s Hybrid low K stacks evaluation project. Responsible for evaluating availability of different low K films and developing etch processes and integration scheme for single/dual-damascene low K spin on stacks.Co-invented process that resolved lowK intergartion issure.

• In charge of

-spin coating and etch application development for flat panel, solar materials and film. Process development, data analysis and customer demo support

-spin coating and etch application development for materials suitable for application from .13 m to .05 m technology.

• As of tool owner, in charge of establishing and maintaining SPC of processes, set up baseline for etchers and coater, sustaining etch and coating processes on all Honeywell spin on low K dielectric, CVD dielectric, and SOG. Responsible for providing trainings to junior engineers and operators on tool operation and maintenance.

• Proficient in using Joel SEM & FIB, FTIR, ellipsometer, n&K, Thermawave optical scope, KLA surf-scan 2132, 6420, KLA /Tencor HRP to analyze and characterize thin film properties.

• Familiar with other metrology technology such as EDAX, AFM, XPS, SIMS and related data analysis.

1999- 2000 New Jersey Institute of Technology, Research Assistant

• Investigation of the electrical properties of Ta2O5/TaSi2 Thin Film on Si substrate.

• Developed PVD process to form TaSi2 thin film on Si substrate.

• Developed thermal oxide process for the growth of Ta2O5/TaSi2 film.

• Characterization of film properties using EDAX, XRD, and measure thin film’s electric properties.

1997- 1999 Micro-analysis center of Fudan University and Shanghai University

• Worked on project: physical Modeling and Microstructure Analysis for Micro-alloy Steel Under Hot Deformation

• Used thermal/dynamic physical simulator to investigate hot deformation behavior of micro-alloy steel. Established physical model for hot deformation behavior of micro-alloy steel by using VB program.

• Steel microstructure investigation, ingredients defining and metallographic analysis with TEM, SEM and XRD

Education:

1999-2000 New Jersey Institute of Technology, Newark, NJ, U.S.A

Master of Science. Materials Science & Engineering-Electronic Materials

1992-1999 Shanghai University, Shanghai, China

Bachelor of Engineering, Electronic Materials and devices

Master of Engineering, Materials Physics and Chemistry

Training and Certification:

• Six Sigma (DMAIC and DFSS Green Belt Certification) and JMP.

• Applied Materials: Fundamental of Plasma etch

Patents upon request

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