SHIZHI CHEN
**-** ***** ***** ********, NY *****
Mobile: 718-***-**** ***********@*******.***
EDUCATION
PhD Candidate, Electrical Engineering; The City College of New York, CUNY; May 2013 GPA: 4.0
M.S., Electrical Engineering; University of California at Berkeley; May 2006 GPA: 3.8
B.S., Electrical Engineering, minor, Computer Science; Binghamton University, SUNY; May 2004 GPA: 3.9
COMPUTER SKILLS
Operating Systems: Window XP, Mac OS, Linux
Programming Languages: C++, Objective-C, Perl, Java, Matlab, Labview, VHDL
EXPERIENCE
Research Assistant, CCNY Media Lab, New York, NY 08/09-Present
Research on computer vision and machine learning area
• Image Scene Understanding using machine learning methods for Classification and Retrieval
• Facial Expression Analysis and Recognition from both face and body gesture modalities
Engineer Intern, IBM, Poughkeepsie, NY 06/12-09/2012
Embedded system verification using C/C++
• Implement read/write utility function for embedded system through RISCWatch
• DDR3 memory characterization test
Research Assistant, Department of Homeland Security (CCICADA Center), Piscataway, NJ 06/10-08/10
Research on automatically facial expression recognition using bi-modal features (facial and gesture features)
• Temporally segmented video frames of expression to neutral, onset, offset and apex phases.
• Designed Classifier to automatically recognize expressions combining both facial and gesture feature.
Electrical Engineer, Bladykas Engineering P.C., Syosset, NY 07/08-02/09
Field survey and design fire alarm and electrical system for middle school and high school buildings
• Created fire alarm and public address design for middle school building
• Created field survey for fire alarm and electrical system for middle school and high school building
Patent Examiner, United States Patent and Trademark Office (USPTO), Alexandria VA 01/08-07/08
Reviewed and examined patent applications in the field of semiconductor device and package
Design Engineer, Supertex Inc., Sunnyvale, CA 10/07-01/08
Designed Circuits for High Voltage EL Driver
Advanced Design Engineer, Altera, San Jose, CA 06/06-09/07
Designed and verified FPGA CRAM. Maintain Spice model for Integrated Circuit design team
• Verify FPGA CRAM Margins in error detection and configuration mode
• Interact with CAD group to implement the cram function check using Perl script
HONORS/AFFILIATIONS
NOAA CREST Fellowship, The City College of New York, CUNY, 2009-Present
Achievement Rewards for College Scientists (ARCS) Fellowship, UC Berkeley, 2004-2006
Academic Excellence Award, Binghamton University, SUNY, 2004
IBM/Watson Fellow Scholarship, Binghamton University, SUNY, 2004
Eta Kappa Nu, Electrical Engineering honor society, 2004
Tau Beta Pi Engineering honor society, 2004
Beat The Odds Scholarship, Children’s Defense Fund, 2000