Electrical Engineering

Jian Liu

*** * ******* ***. ***#*H, Akron, OH, **304 330-***-**** ************@*****.***

(Citizen of China, Holder of EAD card, Green Card expected 05/2012)

EDUCATION

Master of Science in Electrical Engineering GPA: 3.84

The University of Akron Akron, Ohio 9/10-present

Bachelor of Engineering in Information Engineering GPA: 87/100 (Rank 2/90)

East China Jiaotong University Nanchang, China 9/06-7/10

AREA OF INTERESTS

Digital Image Processing, Computer Architecture, Digital Circuit Design

SKILLS

Computer Language: VHDL, C/C++, Assembly, Python and JAVA

Computer Software: Matlab, Quartus II, Xinlinx ISE, ModelSim, Cadence, Mplab, Eclipse and MIPS Simulator

Hardware Programming: PIC Microcontroller and FPGA

Mobile Device Programming: Android Development Platform

Operating System: Linux and Windows

ASSISTANTSHIP EXPERIENCE

Research Assistant, Department of Electrical and Computer Engineering, University of Akron and the Wright Center for Sensor Systems Engineering and Orbital Research Inc.

Akron, Ohio 1/11-Present

Embedded Design of the Armband Heart Rate Monitor 1/11-10/11

• Solid Signal Processing Experience

• Skilled in Analog IC Design

• Real time Filter Design

Troubleshooting for LEON III Microprocessor Design 10/11-1/12

• Experienced with JTAG

Troubleshooting and Testing for Analog IC Chips 1/12-Present

• Comfortable with Lab Equipment, Testing and Reporting

Teaching Assistant, Department of Electrical and Computer Engineering, University of Akron

Akron, Ohio 8/10-12/10

• Communicated with and assisted around 100 undergraduate students to complete their lab projects in an introductory electrical and computer engineering course

OTHER RELEVANT PROJECTS

Design of Tone Map Operator for High Dynamic Range Image

• Strong Understanding of Image Processing

• Solid Experience with Image Compression Algorithms

• Knowledge with Digital System Design

Analysis of Loop Unrolling and Software Pipelining Techniques on WINDLX

• Comprehensive Understanding of MIPS Architecture

Hardware Design for Manchester Carry Chain Adder on Cadence Virtuoso

• Different Adder/Multiplier Designs in Transistor Level

Design for Taylor Series Expansion on FPGA with Limited Hardware

• Digital designs in RTL level

PUBLICATIONS

Jian Liu, Firas Hassan and Joan Carletta, "Embedding High Dynamic Range Tone Mapping in JPEG Compression", IEEE International Conference on Image Processing, 2012, Submitted for Publication

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