RF Test Engineer

ANKIT M SHAH

****, ******** ******, *** #***, San Diego, California-92115. Ph No: 619-***-****

Email:*****.*.****@*******.***

OBJECTIVE: Seeking a full time position in the field of RF/Hardware Engineering

WORK EXPERIENCE:

Hardware Engineer at Sea Space Corporation, San Diego, CA Present.

Performed RF verification tests for various blocks of receiver system.

Helped to redesign micro controller based Antenna Controller Unit.

Debugged circuit problems in Antenna Controller.

Help to measure G/T of antenna system which will use to find link margin of receiver system.

RF Hardware Engineer at Motorola, San Diego, CA. January ’09 – May’09

Performed verification tests, namely spurs, 2nd Harmonics, 3rd Harmonics, VSWR, Phase Noise, Adjacent Channel Power,IP3, IP2 etc., using the Spectrum Analyzer.

Conducted filter verification using Vector Network Analyzer.

Verified power circuits using Circuit Simulation tools such as LTSPICE and GENESYS.

Worked with various shields to measure quality resulting in improving module output through spur reductions.

Debugged circuit problems using the Spectrum Analyzer and High Z probe, identified solutions to issues uncovered, replaced components as necessary to achieve desired results.

Performed DVT testing at different temperatures and verified output of basic RF tests.

Intern at Qualcomm, San Diego, CA. August’08 – Dec ‘08

Analysis and verification of QXDM logs for FTS (Full-Time S-HDR) feature executed with different sequences of 1X and DO technologies.

Generated documents showing data/configuration flow diagrams between various high level hardware blocks for individual processes like MP3 Playback data flow, CDMA 1X Demodulation, CDMA 1X Modulation.

Design document will be used for creation of verification test plan/cases by the verification test group.

Created and maintain on a weekly basis the internal wiki page (QWIKI implementation) for the AST

Compliance Test group.

Intern at Motorola, San Diego, CA. October’07 – July’08

Conducted manual verification testing for various mobile phone features such as remote diagnosis, mobile synchronization, and wireless backup.

Used Test Central tools for test execution, and provided logs using QXDM for assisting in debugging issues.

Designed and documented test cases for all the above features, logged defects, and participated in defect review meetings conducted weekly, and worked with the remote teams for assisting in resolving the defects.

Performed thorough test coverage for assigned features enabling to ship quality product in September’08.

Hardware Design Engineer at Arihant Satiate, India. July’05 – March’06

Conducted microcontroller based hardware design of projects like Input Monitoring System, Air

Conditioning Controlling System, and Home Automation System.

Designed circuits using operational amplifier that take the signal from sensor and convert that signal to an

appropriate level that can be fed into the microcontroller through ADC.

Designed interface circuits and PCB Layout between microcontroller and outputs like seven segments LED, Display, LCD display, PC interface through RS 232, interface with EEPROM (24CO2) etc. using various electronics components.

EDUCATION:

M.S. Electrical Engineering, San Diego State University. Aug 2006-Dec 2008 GPA: 3.53/4.0

B.S. Electronics & Communication, Gujarat University, India Aug 2001-June 2005 GPA: 3.86/4.0

PROFICIENCIES:

Test Equipment: Spectrum Analyzer, Network Analyzer, Signal Generator.

CAD Tools: GENESYS,LTSPICE, ORCAD, HSPICE.

Programming Languages: C, MATLAB, VHDL, Assembly language.

Testing Tools: QXDM, RSD Lite, RadioComm.

COURSE WORK:

Analog circuit Design using Operational Amplifier, RF wireless, Digital Communication, CMOS Mixed Signal Design, VLSI Circuit Design, Digital Signal Processing, Digital System Design, Micro controller.

GRADUATE PROJECTS:

Hierarchical Digital Design, Language used - VHDL

Designed, simulated and synthesized RISC CPU, a 5-stage pipelined computer with ALU control unit,

Instruction memory, data memory and other control units that execute the program for multiplication, and division functions written in VHDL assembly language.

Design of Charge Scaling Digital to Analog Converter, LTSPICE.

Explored the R-2R ladder, capacitive DAC architectures with the using LTSPICE. The specification of the DAC designed was an INL of 21mV (0.13LSB) and DNL of 5.75mV (0.03LSB)

Two stage amplifier Design, Tool used – LTSPICE,HSPICE

Designed and simulated a two stage source amplifier using biasing circuit which is capable to drive a load of 10k resistor and 10pf capacitor in parallel. Verify gain, input pole frequency, output pole frequency, unity frequency with theoretical values.

CMOS and VLSI Design – Tool Used: Mentor ASIC Design Kit

Developed CMOS layouts and performed DRC (Design Rules Check) for basic gates, multiplexer, de-multiplexer, full adder for given area constraints and design rules.

Flash A-D Converter - Tool Used: EldoSpice

Designed and simulated a 3 bit A-D converter using Eldospice. Took sine wave as an input signal and sampled it using sampling system, compared sample value using comparator circuit, encoded the output of comparator using encoder circuit and verified voltage values at different points with expected values.

BPSK System Simulation:-Tool used: MATLAB.

Generated random BPSK modulated symbols, passing them through Additive White Gaussian Noise channel, demodulated at the receiver and plotted the graph of bit error probability to different Eb/No values.

References:

1)Maric Ivan - Principal Engineer at Motorola.

2)Amitabh mathur - Director at Qualcomm.

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