Name: Wuwen Li Address: Irvine, CA
E-mail: *******@****.*** Tel: 858-***-****
HIGHLIGHTS
** ***** ** ********** ** Bluetooth, CDMA/WCDMA modem design and implementation
** ***** ** ********** ** embedded C/C++ development in wireless communication
In-depth knowledge of various OS kernel source code and DSP, ARM processor SoC core
Good understanding of DSP and communication theory and broad knowledge in HW, SW and system
EXPERIENCE
January 2011– Present, UCLA Electrical Engineering Department
Advisor: Greg Pottie, Professor and Area Director, Signals and Systems
Research Project: A bandwidth and power dynamic reallocation algorithm for CDMA and OFDM network to achieve fair data rate for delay sensitive traffic flows.
October 2010 – January 2011, Trellisware Senior DSP SW Engineer
Cheatahnet radio DSP protocol stack software development debug
TI AAC audio codec, codec engine integration
November 2006 – Oct 2010, Bluetooth Firmware & System Design Group, Broadcom San Diego
Senior Staff Engineer
Bluetooth SBC codec firmware implementation
C model RTL bitmatching, FMRX audioPause FPGA implementation, FMRX rdsAGC performance fine tune
July 2001-- October 2006, DSP group, Nokia, San Diego
Senior design engineer
CDMA 2000 1X, EVDO DSP SW design & implementation
October 1999-- July 2001, WCDMA-DSP group, Nokia, Finland
DSP design engineer
Rake receiver DSP SW design & implementation
March 1999-- September 1999, CCC Mobile, Finland
Software engineer
IrDA communication driver SW development on Symbian based PDAs.
April 1998-- February 1999, Hitachi Semiconductor America, China Design Center
Software engineer and team lead
Cable modem MAC layer SW design & implementation
V.34 Software modem design and implementation
March 1997-- March 1998, Founder Information System Corporation, China
Software engineer
Email software RSA, IDEA, MD5 encryption SW module design & implementation
Banking system based on Informix database
ACCOMPLISHMENTS
Research project on design and simulate a hybrid resource reallocation algorithm for CDMA and OFDM network to achieve fairness between delay sensitivity traffic flows
In this research project, I designed and implemented 2 dimensional CDMA and OFDMA network simulation software using C++ and Boost library. The simulation software runs on UCLA ATS super computer. OpenMP and MPI are used for parallel computing to speed up simulation speed. A hybrid resource ( bandwidth & power ) reallocation algorithm is designed to balance the data rate among different traffic flows. The goal is to maintain the fairness among traffic flows and maximize network throughput. Flow rate is calculated based on interference level. Traffic flow arrival is modeled to follow Poisson distribution, flow average rate variance is computed as measurement of fairness. Two power control methods are implemented, they either base on channel gain or flow rate.
Bluetooth system design group: FM channel search algorithm design, FM rdsAGC performance optimization, FM audioPause C model and Verilog FPGA implementation
Worked on C model and Verilog implementation for different modules including FM channel search algorithm design and audioPause. C model and Verilog algorithm bit-matching, fix point DSP filter and RSSI filter characterization. Fine tuned rdsAGC parameter to improve its sensitivity. Coded Python scripts to use GPIB to control various lab equipments for system performance measurement and optimization.
Bluetooth firmeare group: physical layer firmware design, implementation, debug and patch
Implemented SBC decoder. Worked on dynamic CPU clock control, error dump module. Coded a perl script to parse the error dump. Worked on ROM firmware debugging and fixing bugs by ROM patch.
DSP SW for CDMA 1X EVDO forward traffic channel demodulation design & implementation
Designed and implemented DSP SW to decode forward traffic channel for all rates. Created design and tested specifications, and performed implementation and lab testing. The SW module had a state machine, which processed L1 protocol signaling messages and controlled ASIC blocks to decode receiving data that was modulated in PSK or QAM.
CDMA 1X MAHHO DSP SW design & implementation
Performed 1X MAHHO(Mobile Assistant Hard Handoff) feature requirement analysis. Designed and implemented DSP SW to realize the MAHHO feature. The SW module included a state machine, which processed protocol signaling messages, controlled RF and searcher HW blocks, and reported candidate frequency search result. Led an IOT team to test MAHHO in Lucent lab.
CDMA 1X DSP SW bug fixing, field performance improvement
Analyzed field test logs; improved system performance; corrected critical SW errors in time. The errors included: bus errors, TI silicon bug, out of memory errors, low throughput in high speed data in the field, and others. Matlab was used to plot different measurements done in the field for performance analysis. Perl was used to post process field trace data.
WCDMA rake receiver DSP algorithm and software design & implementation
Designed and implemented DSP SW module, which controlled various ASIC blocks, including: finger, combiner, and DLL. The SW module controlled physical channel setup and release, ran finger allocation and tracking algorithm, and performed soft handoff. TI DSP C55 was used in this project.
Cable Modem MAC layer protocol SW design & implementation
Performed requirement analysis based on DOCSIS standard. Designed MAC layer SW architecture. Led a team to implement Cable modem MAC layer SW on SH3 DSP processor and VxWorks.
V.34 Software modem design and implementation
Design & Implemented V.34 SW modem on SH3-DSP including training sequence detection and training, viterbi decoder.
Digital signature and data encryption algorithm implementation
Implemented RSA, IDEA, DES, MD5 in pascal and X86 assembly language for Email client software
EDUCATION
2011 – present, PhD UCLA in Signal Processing and Communication, pass Preliminary Exam
course work: Convex optimization, wireless communication, multimedia communication and network, matrix analysis, linear programming
2008 – 2010, M.S.EE UCLA in Signal Processing and Communication
1993 – 1997 B.S. in Computer Science, Central University for Nationalities, Beijing
SKILLS
Programming language:
X86, ARM7 and TI DSP assembly language, matlab, C/C++, perl, python, Verilog, Ruby, SQL
Software and development tools:
modelsim, VCS, Verdi, Cadence icfb, make, GPIB programming, Boost library, OpenMP, MPI for parallel computing, Lapack, Blas, Umfpack, Git, VxWorks, OSE, Linux, ThreadX, MySql
Test equipments:
spectrum analyzer, logic analyzer, realview debugger
PUBLICATIONS
1. Virus 'Mulint' and Anti-Tracing Method of Reverse Instruction Flow, PC World, May 1996.