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Engineering Manager Semiconductors

Location:
Fort Worth, TX, 76108
Salary:
110,000
Posted:
November 04, 2013

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Resume:

Resume

Steve v. Illyes

***** ***** *****. **** *****, TX 76108

Email: kwy1l0@r.postjobfree.com, phone: 817-***-****

Summary:

** ***** **** ********** ** Test, Product, Production, R&D development and Q&R Engineering. Hiring, training and development of staff, problem solving, work closely with support groups and vendors, as well as managing quality, product ramps and new product introduction. 11 years’ experience with IT company overseas, implementing WAN/LAN, wireless distribution, VOIP, VDO, servers, security and custom software development. Goal and bottom line oriented, sound decision making and excellent people skills.

Education/Publications:

1983 BSEE, University of Texas Arlington, TX (Electronics)

1987 MBA, National University, San Diego, CA (Executive IT Management)

1992 IEEE Manufacturing, Boston “Wafer level Statistical Bin Limits”

1994 IRPS, San Diego “Wafer stress test for latent failure mechanisms”

Languages: Fluent in English, German, Portuguese and Thai

Employment History:

2000-2012 Phuket Wireless, Thailand, Managing Director

Developed and deployed WAN/LAN/RAN and wireless networks, installed, tested and deployed server software and hardware for the Thai government agencies. Developed and deployed video surveillance systems and alarms for various government agencies. Implemented Video On Demand (VOD) and a global database for 110 countries consisting of over 3000 records, automated billing, rankings and communication. Acquired in depth understanding of industry standards, practices and specifications and laws.

1995-2000 Intel Co. Process/Program Manager, Phoenix Fab 12

Responsible for Intel’s largest and newest wafer facility from construction to 20,000 wafer starts per week. Process was .18 and .13 microns. Duties included working with R&D in Portland to plan, execute and monitor Intel’s newest product lines, such as hiring, training most of F12’s staff, qualify process and test equipment, install equipment, certify technicians, work with vendors on equipment delivery, improvements, spares, development of all equipment. Fix and improve key indicators such as scrap, product speed (Lithography), material usage, headcount to w/s, cycle time, Q&R issues and process streamlining. Change control management, equipment uptime and material/wafer cost management and “flex-lines” were deployed to meet the rapid growing and changing product demand. Implemented on line databases and indicators to “real time” feed indicators to line technicians. Was also responsible to train all personal and monitor the 2 processes in F11 (Albuquerque), F18 (Israel) and F14 (Ireland). Integrated teams of Mfg./Process/Test were used to maximize output and minimize cost and quality problems. Direct staff consisted of 128 Engineers and 35 technicians.

1989-1994 Intel Co. Product/Q&A Engineering Manager, Albuquerque

Managed, and coordinated Production and Testing 24/7 of the Eprom/Flash/386DX/486 product lines. Duties included ramping new products and processes to meet Co. goals, such as cycle time, u/d improvements, Q&R goals and headcount efficiency. Specifically develop and improve sort testing and process fixes, analyzing rejects of sort, test (backend) and customer returns and implementing corrective actions. Drive statistical process control, hire, train and deploy technicians to “own” process and equipment stability, procure equipment and spare parts and train and deploy line maintenance technicians. Set-up (fist time at Intel) wafer level statistical product control, implemented wafer stress testing to eliminate backend burn-in (first at Intel), worked with various specialized customers to implement environmental wafer testing. Assembled cross functional SWAT teams (yield, line maintenance, production) to fix critical areas and streamline communication. Translated and communicated company programs such as zero defects, 6 sigma into line indicators. Was the acting F7 manager for extended periods. Direct staff consisted of 37 Engineers and 17 technicians.

1984-1989 Intel Co. Sr. Test/QR Engineer, Santa Clara/Sacramento

Developed test software and hardware for Eproms, Flash memories Ram memories and microcontrollers. Responsible for line maintenance of all component testing and assembly, operations support both in the US and Offshore. Systems used DEC PDP11, Watkins and Johnson, Intel MDS, UNIX, SQL and Oracle database. Performed extensive failure analysis and corrective actions at Ford, Delco, GM and Bosch. Supervised 12 Engineers and technicians.



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