Post Job Free
Sign in

Electrical Engineer Design

Location:
Waukegan, IL, 60085
Salary:
48000 USD.
Posted:
March 30, 2012

Contact this candidate

Resume:

Lin, Bo-Han

****W. Glen Flora Ave. Apt.***, Waukegan, Illinois 60085

Email: iyfga6@r.postjobfree.com Phone: 847-***-****

Objective

Seeking full-time employment in SW or HW Test Engineer. With more than one year of industry experience as an electrical engineer, I have the capacity to work independently or in a team environment.

Summary

Motorola SW testing engineer duty includes execution product functionality, create test strategies and test cases to assess product quality. Second, automation package release included write KPI auto- run XML Script, KPI pre-set up shell script, KPI start point and stop point image, KPI package release notes. Third, analysis log and work with developer to fix software problem.

Master graduate in VLSI and Microelectronics, with 2 years of research experience as an electrical engineer and varieties of academic project experience. Enthusiastic on integrated circuit design, good at schedule, design, debug and implementation of whole project in specific duration, tradeoff between the requirement of custom and the challenge of the project, can work independently as well as a team member in demanding market environment.

Technical Skill

Software test: Xml, Python, Linux

Circuit design: AutoCAD, Spice, HDL, Cadence, Modelsim and Synopsys

Signal analysis: Matlab

Education

Master of Science in Electrical and Computer Engineering May 2011

• Illinois Institute of Technology, Chicago, Illinois, USA

Bachelors of Science in Physics Jun 2006

• National Taiwan University, Taipei, Taiwan

Publication

Bohan Lin, Fan Wu, Haiqing Nan, and Ken Choi , Low Power Process Monitoring Circuit in Near-Threshold Region for Deeply Scaled CMOS Technology, IEEE EIT on May 2011

Work Experience

Motorola Mobility, Chicago, Illinois, USA June 2011-Present

Software Testing Engineer, Architecture Team

• Execution product functionality, create test strategies and test cases to assess product quality and Kernal Perfermance Indicator cases

• KPI package release including KPI auto- run XML Script, KPI pre-set up shell script, KPI start point and stop point image, KPI package release notes

• Evaluate Implement all test cases by manual or automatic quickly and with great accuracy in order to pinpoint problems

• Build and maintain an automated test infrastructure for multiple product lines

• Work with a team of mobile handset engineers to verify new features and help drive product quality to the highest standard

• Establish processes and tool set to maintain automation scripts and generate regular test reports

• Analysis log and work with developer to fix software problem

Illinois Institute of Technology, Chicago, Illinois, USA May 2010-May2011

Research Assistant, Professor Ken Choi Laboratory

• Improve a low temperature coefficient processor monitor in 45nm and published it

• Improved a low supply voltage and low dissipation process sensor in 45nm and published a paper on March/2011 in IEEE EIT conference

• Responsible for the design of the sensor circuit, the simulation check with Synopsys CAD tools, analysis of the circuit to modify the original design in our lab past used the layout research with CAD

• Worked closely with Professor in the whole progress in most projects

• Refined ADC/DAC, oscillator, filter in circuit level in lab research

Tatung University, Taipei City, Taiwan Oct 2007 – Mar 2008

Research Assistant, Cheng-Ching Huang’s Laboratory

• Designed circuit and simulation with Cadence and matlab

• Adjusted the parameters of different devices to meet the specification

Ministry of National Defense ROC, Yilan, Taiwan Sep 2006 – Oct 2007

Corporal

• Provided leadership, motivation and discipline as required within a team, and made sure the unit was managed efficiently

Tatung Corporation, Taipei, Taiwan Jun 2002 – Sep 2002

Intern test engineer

• PCB testing and troubleshooting

Household Registration Office, Taipei, Taiwan Mar 2000 – May 2001

Census investigator

• Collected statistical data for census and computed data into digital system

Project experience

CAD Tool Design for Time Slack Analysis with Tcl/Tk and C Programming Dec 2010

• Learned how to design CAD tools for STA engine in VLSI design for the proposed circuit.

A Novel Adaptive Design Methodology for Minimum Leakage Power Considering PVT Variations on Nano-scale VLSI Systems Oct 2010

• Implemented process and temperature sensor, ADC, lookup table, regulator, current comparator, and leakage monitor from Kyung Ki Kim paper in Professor Ken Choi Laboratory

An Ultra-Low Power 220nW Temperature Sensor for Passive Wireless Applications Jul 2010

• Implemented temperature sensor and switched-capacitor data converters from Yu-Shiang Lin paper in Professor Ken Choi Laboratory

RTL Power Reduction Methods May 2010

• Implemented the whole job of the “FSM Re-encoding”, “Improved FSM Re-encoding” and “Operand Isolation methods for RTL power reduction

Op-Amp – wide bandwidth (f (-3dB) > 150 MHz) April 2010

• Designed an OP circuit and simulation with Pspice tool.

• Adjusted the parameters of different devices to meet the specification.

4-bit Adder Circuit with Dual-VT Logic on 10T Full adder in 45nm model Feb 2010

• A 10T full adder is sketched using Cadence Virtuoso, and verified with Hspice and nanosim

simulation in speed and power.

Adder Architectures in ALU design Dec 2009

• Implement, synthesize, layout and simulate various adders in a simple ALU design using Verilog HDL. The adder architectures include: Carry-ripple, Carry-lookahead, Carry-select,Carry-skip, Cogge Stone and Brent Kung tree adders.

32-bit Pipelined Central Processing Unit (CPU) Nov 2009

• Designed and Synthesis a 32 bit CPU with the carry-ahead adder.

• Implemented the arithmetic operation with CPU included addition, subtraction, multiplication and division

RISC processor which is basically a stripped down MIPS processor Oct 2009

• Implemented a processor is a 32-bit version of the MIPS processor; however, the instruction set will be a small subset of the actual MIPS ISA. I should implement the multi-cycle data path version of the processor utilizing the VHDL hardware descriptive language.

Extracurricular Activities

Member, Tzu Chi Foundation May 2011 – Now

Activities Coordinator, Student Volunteer Services of NTU Sep 2003 – Jun 2006

Member, Volunteer Team to World Version Sep 2003 – Jun 2006



Contact this candidate