Engineer Design
Resume:
Robert C. Berlin Jr.
Orlando, FL 32812
Phone: 407-***-****
Email: **********@***.***
Objective
Continue Hardware Design / Systems Engineering / PCB Design/ FPGA design/ FAE Career.
Skills:
Hardware Design
Analog – General voltage/current feedback, inverting/non-inverting Op amps. High/low/bandpass
Op amp filters, ADC/DAC signal conditioning, analog closed loop servo control.
Battery - Rechargeable/Non-rechargeable military/commercial batteries. Li-Ion, NiMH, LiSO2,
NiMh chemistry.
Components - Maintain approved standardized parts list, manage obsolescence, manage failure
analysis with production/manufacturer, work with design engineering during
component selection, document control, work with quality for incoming inspections/
production inspections. Verify selected components meet design requirements.
Digital - High Speed, general logic control, standard cell ASIC control logic. Memory - SDRAM,
DDRAM/DDR2, SRAM, DPSRAM, FIFO, and Flash.
FPGA - High density, DSP, IQ up/down converters, System On Programmable Chip (SOPC), and
VHDL/Verilog HDL.
Life Cycle Design - Customer specifications, design concept, system architecture and interface
documentation, risk analysis/mitigation, parts selection, schematic, layout,
fabrication/assembly, First Article Test, production support, failure analysis,
obsolescence issues/resolutions, end of product life.
Low Power - digital/analog and energy harvesting.
Mixed signal - RF, digital, and analog.
Network System Design - Cisco Network Design for Microwave, VSAT, HF, and VHF/UHF VOIP
communication systems.
PCB Board Design - 14/18 layer high speed digital, 6 layer RF, digital, and analog boards, power
and crosstalk analysis, BOMS, and device purchasing.
PCB Design Cycle - Architecture, interface/WRL documentation, power and crosstalk analysis,
component selection, schematic capture, symbol/footprint generation, constraint
generation, board layout, through-hole/blind/buried via requirements, design for
fabrication/assembly to RoHs standard, and testing/integration.
Library Management (PCB/Software) - Components engineer, Maintained revision control for software development, IPC compliant schematic symbols/footprint development and manufacture library’s, current tool suite software and licensing. Interface with engineers/manufactures to ensure standards and manage obsolescence issues, and managed all device failure analysis.
Component Packages – SMT/through-hole, high density BGA's, SOP, TSOP, TSSOP, QFN, and DIP.
Power - DC/DC switching/linear regulators, COTS power supplies and system power architecture
design/analysis.
Processors - ARM9, PIC, MSP430, and NIOS II soft core RISC FPGA processor.
Radar Systems - Unattended ground sensors, Ground Penetrating, Altimeters, Fire Control, and
Missile.
Radiation Design - Knowledge of Rad hard/Rad Tolerant devices , SEE, SEU, SET. Radiation effect
vs. orbits. Commercial device Rad Tolerant screening.
RF - Voltage controlled attenuators, mixers KU band radar IF chain, Laser radar receiver.
System Interface - ECL, Ethernet LVDS, I2C, RS232, RS485, SPI, USB 2.0, and Memory
(DDR2, FLASH, SDRAM, and SRAM).
System Interface Cable Design - Architecture/interface/protocol definition, WRL, AWG
requirements, routing, construction, interface and EMI,
verification, documentation generation, management, and
ECN control.
Test Equipment - Network Analyzers, Spectrum Analyzers, Oscilloscopes, DVM.
Tools - Protel, Altium, Orcad, Viewlogic schematic and place/route tool suites, Altera, and Actel
FPGA tool suite, Cadence Virtuoso ASIC tool suite, Simplicity, Modelsim, MSP340
and PIC processors tool suite, Spice simulation tools, and Microsoft Office 2007, Vizio.
Miscellaneous
ITAR certified
Configuration and Document Generation and Management
Technical Proposals
Secret Clearance- inactive
Employment History
Senior Technical Staff Engineer, October 2008 - January 2012
Camgian Microsystems, Maitland, FL
Hardware Design, System, Library Management, Test engineer, and component control, for both military and commercial products.
Company products - Multi-Sensor Systems, Unattended Ground Radar Sensor (UGS), Satellite Sonar/Accelerometer sensor gateways, and Thermo-electric Energy Harvesting Systems.
Hardware Design
High speed digital DSP board for an Unattended Ground Sensor, Control board for Satellite-Sonar/Accelerometer sensor gateways, Interface board for RF ASIC load board.
Altium/Protel PCB, Cadence Virtuoso ASIC, Altera Quartus II FPGA, and Modelsim simulation design tool suites were used to implement designs.
PCB Design
Lead design engineer for initial prototype and follow-on production redesign for the 14/18 layer high speed digital DSP board. Task required scheduling, cost control, risk assessment/mitigation, and manpower allocation. Successfully completed design.
Utilized PCB Design Cycle defined in Skills section above to implement design. All designs required primary design and critical design reviews in accordance with established company policies and procedures plans.
Components utilized were Altera Cyclone III, ARM9, DDR SDRAM, SRAM, DPSRAM, FIFO Flash, Ethernet, and USB 2.0 devices. Interface protocols were SPI, GPIO, Ethernet, USB2.0.
DSP and NOIS II soft core RISC processor IP as well as, VHDL generated control code and DSP integrator function were used to implement design.
Satellite - Sensor/Sonar/Accelerometer Sensors gateways, 6 layer analog/digital boards utilized PIC uProcessor, RS232, RS485, and One-wire interface components. Utilized PCB Design Cycle defined in Skills section above to implement design.
ASIC load board design, 6 layer high speed digital board using Verilog to implement control logic for PLL, DDS, and ring oscillator functions. Design targeted IBM's 130nm 8HP standard cell technology.
System Design
Designed Multi-Sensor system utilizing COTS IR camera, radar sensor, and satellite modem. Developed architectural/system specifications per customer requirements, conducted trade study and cost analysis (ROM), mechanical packing, power analysis, and battery selection. Defined interface/protocol requirements and cable requirements. Researched packaging design and manufacturer.
Thermal Energy Harvesting feasibility study design to provide trickle charge for a military BB smart battery power source.
Hardware Design Engineer, October 2007 - August 2008
L3 Communications Cyterra, Orlando, FL
Hardware Design Engineer for both military and commercial hand held mine detector systems.
Hardware Design
Lead design engineer for a Low power smart battery application. Task required scheduling, cost control, risk assessment/mitigation, and manpower allocation as well as design. Design was successfully completed.
Component engineer maintained control of all component selections, approval process, standardized component usage, control documentation, obsolescence, failure analysis.
Developed system performance characteristics for the following rechargeable/non-rechargeable military and commercial batteries. In-system tests were conducted for the following battery chemistry Li-Ion, NiMH, LiSO2, NiMh batteries.
Components utilized were a MSP430 uController, Opamps and ADC.
ORCAD PCB, MSP430, and Modelsim simulation design tool suites were used to implement designs.
PCB Design
Low power smart battery application, 6 layer analog and digital board. Utilized PCB Design Cycle defined in Skills section above to implement design. Design required primary design and critical design reviews in accordance with established company policies and procedures plans.
Addition design requirements included First Article Test, temperature, EMI, vibration, shock, reliability, ECN, drawing modification, production assembly and test procedures were also generated. Supported production for failure analysis and obsolescence issues.
Component engineer maintained control of all component selections, approval process, standardized component usage, control documentation, obsolescence, failure analysis. Library Manager maintaining company/manufacture software, schematic and layout devices and software development file in SVN controlled. directory. Verified company wide generated schematic symbols and footprints before incorporation in to controlled library. Interface with engineers/manufactures to ensure standards and manage obsolescence issues, and managed all device failure analysis.
Hardware Design and Communication Systems Engineer March 2006 - October 2007
Comtech Systems Inc, Orlando, FL
Hardware Design, Systems, and Technical Proposal Engineer.
Hardware Design
Communication BER tester, power status/monitor controller, COTS Solid State Power Amplifier digital controller and interface.
Component engineer maintained control of all component selections, approval process, standardized component usage, control documentation, obsolescence, failure analysis.
Each design utilized and Altera Quartus II FPGA and modelsim simulation design tool suite.
Cyclone II FPGA devices and VHDL implemented control logic.
Systems Design
Systems engineer selecting, based on customer requirements, COTS VHF/UHF communication equipment for both a Tropro-scatter and LOS military communication systems. The system design required but not limited to, ROM analysis, trade studies for main system components, antenna selection, transportation equipment, rack enclosures, power system. Cable system architecture/interface/division/protocol definition, power requirements/analysis. WRL, AWG requirements, mechanical drawings, routing, construction, interface and EMI, verification, documentation generation, management, and ECN control.
Technical proposal engineer for several multi-million dollar Software Defined Radio, Microwave LOS, HF, VHF/UHF, and Satellite communication systems.
FPGA Field Application Engineer, November 2005 - January 2006
Alliance Group One, Oldsmar, FL
Actel factory certified FAE providing technical support for major Actel accounts in the Florida market. Highly involved in all phases of customer design cycle from concept to production.
Dedicated Field Application Engineer (DFAE), November 1996 - November 2005
Arrow Electronics, Orlando, FL
Supported customers requiring Rad Hard and Rad Tolerant devices. Supported the Rad Tolerant screening of commercial products (memory, FPGA, Bus, and other device family types.)
Altera factory certified DFAE providing technical support for both commercial and military customers in the North Florida region. Supported all phases of customer design cycle from concept to production.
Emphasis was on embedded soft core RISC processors, DSP in FPGA’s SOPC systems, digital IQ up/down converter applications. Additional duties included product presentations, instructor for hands-on VHDL classes.
Yearly plan performance was consistently in the top 5% for all Arrow FAE’s for 8 out of the ten years at Arrow.
Received the following awards for outstanding customer support.
Awards: 2001- Altera Most Valuable Partner Award for Southeast region.
2004- Altera & Arrow A+ award for outstanding customer support.
Hardware Design Engineer, March 1986 - November 1996
Lockheed Martin, Orlando, FL
Hardware Design, Systems, and Test Engineer
Program Product Manager for the Pershing Missile Systems Radar and Area Correlation Unit. Maintained schedule, manpower, customer and production support.
Hardware Design
Longbow missile digital interface board and analog antenna closed loop gimbals servo system board Mixed signal RF Sensitivity Time Control board for the Thirsty Sabre program. Analog signal conditioning interface board for the Navy CASS program. Multiple RF, digital and analog designs for Radar R&D group.
Designs utilized PALs, GALs, ECL interface, voltage controlled attenuators, EEPROM, DAC, and
Op amp components.
Systems Design
Radar R&D Department and Navy CASS Programs.
The design required but not limited to, the selection of COTS equipment, rack enclosures, and power system/analysis. Cable system architecture/interface/division/protocol definition, WRL, AWG requirements, mechanical drawings, routing, construction, interface and EMI, verification, documentation generation, management, and ECN control.
Test Engineer
Antenna and radome test engineer on the Longbow Fire Control system. Testing utilized Scientific Atlanta's compact antenna test chamber to characterize all prototype antennas and radomes.
Awards: 1987- Pershing Black Jack award for outstanding contributions to the Pershing Missile
Runner-up for Corporate Intern Program.
US Navy, 1975 - 1981
NAS Jacksonville, FL
Aviation hydraulic and structural repair technician for SH3 helicopters. Test flight crewman.
Education
B.S.E.E Florida Atlantic University.
Boca Raton, FL (RF, Microwave and Antenna design).
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