nanoelectronics, semiconductor software engineer

Objective

Being passionate to excel, I wish to be a part of a team working on challenging projects in Electrical Engineering (Full time/part time/internship position)

Education

Master of Science (M.S) in Electrical Engineering May 2009

North Carolina State University, Raleigh, NC GPA- 3.67

Bachelor of Engineering (B.E) in Electronics and Communications, (First Class with Distinction, May-05)

Visvesvaraya Technological University, SJ College of Engineering, Mysore, India

Technical Skills

VLSI design/Process simulation tools: Synopsys (HSPICE, TCAD), Silvaco-TCAD (supreme, atlas), Cadence (Virtuoso), Mentor Graphics (Calibre)

Programming language/tools: MATLAB, Mathematica, Maple, C/C++ (STL), GDB, GCC, ClearCase, Purify, Wireshark, Xcode (Carbon), POSIX thread library, Assembly 8085/8086, MS-Excel, MS-Word, MS-PowerPoint, Eclipse.

Operating systems: HP-UX, Linux, Solaris, Mac OS X, Windows 2K, XP, Vista.

Graduate Courses

Principles of MOS Transistors, IC Tech. & Fabrication (Theory & Lab), Physical Electronics, Semiconductor thin film technology, VLSI Systems Design, Digital Electronics, Fundamentals of Power Electronics, Frontiers of Nanoelectronics, Advanced Mathematics for Engineers and Scientists

Academic Projects

Semiconductor Devices Related Projects

Semiconductor Process design: Designed a 65nm semiconductor process with appropriate doping, thermal processes, layer dimensions, simulated devices (MOSFETs, Diodes and Capacitors). Calculated the expected biases and tolerances for the layers to develop ground rules, designed the layout of test circuits and developed a model library for the process.

Device Modeling: Modeled 22nm MOS transistors with appropriate junction depths, doping species and concentration, using high-k dielectric and metal layers in the gate stacks (Si & Ge devices -both PMOS & NMOS using Synopsys TCAD) to meet the target for 2008-09 in the ITRS roadmap.

Fabrication and Test: Fabricated and characterized MOSFETs, capacitors and test devices on a 4” wafer using 3µm technology at NCSU nanofabrication facility. Learnt all the fabrication steps – oxidation, photolithography, etching (reactive ion and chemical/wet), CVD, metallization and annealing

Research on physics based IGBT model for Saber/SPICE: Studied the physics based device models of IGBT for circuit simulation, including the popular Hefner’s model of Si-IGBT (both punch through and non-punch through) with an aim to develop a model of SiC-IGBTs with a blocking voltage of 10kV (at the SPEC/FREEDM center, NCSU), including the effects of the JFET region and the Current Enhancement layer (CEL) or the Current Spreading Layer (CSL). Simulated the SiC IGBT to find the I-V characteristics, the depletion region distribution and minority carrier distribution during turn off and turn on. Saber MAST template was planned to be used to implement the model.

VLSI circuit design related projects

128b SRAM design: Designed the bit cell (6T-cell), row decoder and precondition circuitry. Visualized the high level floor plan, designed the clock tree and integrated layout of the individual blocks. (full custom design). Used the NCSU FreePDK model library for the 45nm technology node

Modified SAFF design: Designed a modified Strong Arm flip flop (SAFF)/Sense amplifier flip flop at 45nm technology node, achieving 5Gbps operation at 90˚C. Non ideal input sources used – optimized to reduce power consumption.

Transceiver design: Designed a 1-bit wide current mode transceiver at 45nm technology node achieving 5Gbps operation at 90˚C and meeting the eye opening while minimizing power.

Boost Converter design: Designed a boost converter with voltage-feedback-control loop using OrCAD. Designed a PID controller for the project

Work Experience (23 months)

Software Engineer, Tidhi Enterprises

Successfully used and modified Foremost- a console program to recover files based on their headers, footers, and internal data structures to recover Internet Explorer and Firefox cookie files as part of “DeciTrace”- A comprehensive forensic tool to scan, clone, recover data from computer hard disks, emails

Software Engineer, Flextronics/ Hughes Software Systems, Bangalore (Aug-05-Mar-07) Designed and developed 3G/UMTS simulators as part of a team ClearCase used as a repository for project’s code and documents.

Single handedly added proprietary protocol support in C to Wireshark (Ethereal), for use in BSR (Base Station Router) project (protocols similar to RANAP, MAP). Understood the protocol tree in Ethereal and the packet dissection mechanism (Jan-07 –Mar-07)

Designed and developed the MSC simulator in C++-STL using the POSIX thread library.

Developed the message parser and file parsers for reading the input from the config file and the message file of the simulator. Developed the module to create and populate the message objects from the output of the message parser. Designed and developed the module to handle ASN.1 encoding/decoding after learning the OSS Nokalva ASN.1 encoder/decoder library and the ASN.1 compiler in C meeting the requirement of sending a response within 20 msecs of the incoming request. MSC (Mobile Switching Center) simulator is a multi threaded application designed to receive IuCS’ interface control plane (RANAP) messages sent from the BSR (Base station router) towards MSC, and send response messages, configured by the user, as if sent by the real network component, in effect simulating the GSM infrastructure. Simulator closely follows the 3GPP specifications (Jan-06 – Jan-07)

Single handedly designed and developed a software daemon in C/C++ using the pthread library, termed the “Health Monitor Utility”, it was designed to monitor processes of the 3G simulator- restart, abort, send signals and report the status to the user via an UI. Designed the user interface and the file sockets based communication between the daemon and the client UI. Gained extensive knowledge of Linux APIs, socket programming, signal handling. (Oct-05 – Dec-05)

Intern, Hughes/Flextronics Software Systems, Bangalore (Feb-05 to Apr- 05)

Developed a package designed to monitor SNMP enabled network printers. Designed and developed an SNMP manager in C using the Net-SNMP library in Mac OS X BSD kernel. Jointly designed and developed a GUI in Xcode (Carbon, Cocoa).

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