Electrical Engineer (Semiconductor devices/Manufacturing)

HARISH NARENDAR

**** ******* ******, *** ***, Santa Clara, CA 95051,

Ph:513-***-**** E-mail:********.******@*****.***

OBJECTIVE (Availability: Immediate)

Extremely self motivated team player seeking full time/Internship positions that are challenging and competitive in the field of microelectronics where I get the opportunity to face new challenges, present myself best with new ideas and that strongly utilizes my skills in Semiconductor device technologies.

SUMMARY

•Strong knowledge on CMOS device modeling and optimization of performance• Established in‐depth knowledge of CMOS device Physics, scaling trends and fabrication procedures •Knowledge of Analog circuits including Op-amps and data converters •knowledge and experience on device packaging• Possess Clean Room device fabrication experience (Class 10, Class100) •Experience with Photolithography • Familiarized with structure and operation of VLSI devices including RAM and ROM•

EDUCATION

Master of Science, Electrical Engineering - University of Cincinnati, Cincinnati, Ohio Expected Mar’09

• GPA - 3.6/4.0

• Relevant Graduate courses: Semiconductor Physics, Semiconductors and Hetero-Junctions, Silicon millimeter wave devices,

Silicon device fabrication lab, Micro-fabrication of semiconductor devices, Fundamentals of MEMS, Nano Electronics,

Bachelor of Engineering, Electronics and Communications - Anna University, Chennai, India Apr’05

• GPA - 3.4/4.0

• Relevant courses: Advanced electronics, Digital Electronics, Communication Theory, Circuit theory, Microprocessors.

RESEARCH EXPERIENCE

Thesis: A Simulation study of Enhancement mode InAs Nanowire MOSFET: Advisor- Dr. Kenneth P. Roenker Jan’08-Dec’08

• Developed comprehensive knowledge on Nanoscale device physics of MOSFETs and scaling trends in CMOS devices

• Simulated and analyzed the effect of different device structures for an Indium Arsenide Nanowire MOSFET.

• Analyzed the device performance for variations in channel length, dielectric thickness/material, channel thickness and doping.

• Optimized the device for the best sub-threshold slope, lowest leakage currents, high ON/OFF ratio and optimal threshold voltage

Thin Film Coatings on Silicon: Jun’07

• Engineered silicon samples with thin film hydrophobic coatings; Gained valuable experience with dip/spin coating of photoresist.

• Patterned hydrophobic fluoro-polymer coatings on silicon samples using photolithography, Optimized film thickness.

Design, Fabrication, testing and packaging of silicon Piezoresistive MEMS Pressure sensors: Jan’07 – Mar’07

• Designed masks using AutoCAD for Photolithography in different stages in the fabrication of the pressure sensor.

• Tested the sensor for linearity and hysteresis over a pressure range of 15-45 Psi. Obtained a good sensitivity of 83mV/Psi

• Performed device characterization for oxide thickness and carried out two point and four point sheet resistivity measurements.

• Gained experience in Mask designing, resist spinning, Anisotropic etching, handling mask aligners, Wafer bonding, device testing.

Millimeter wave devices and Circuits: Jan’07

• Simulated energy band diagrams across Hetero-Junctions in bipolar and III-V HEMT transistors by determining depletion

width, band discontinuity and amount of band bending of the energy levels. Studied the effects of doping on band bending.

Fabrication of Sub micron diffraction gratings: Aug’06

• Fabricated silicon diffraction gratings using photolithography and tested the gratings for wavelengths of maximum diffraction.

• Utilized the technique of double beam holography using a second harmonic generation Argon laser at a wavelength of 244nm.

PROFESSIONAL EXPERIENCE

Electrical Engineer Intern, Hindustan Aeronautics Ltd, Ministry of Defense, India Nov’04- Mar’ 05

• Designed a control system that mimics a Flight Control Unit (FCU). Implemented a feedback system that controls the amount of fuel pumped into the engine depending on the thrust required. The circuit was designed and tested using ORCAD.

TECHNICAL/SOFT SKILLS

• Fabrication experience– Photolithography, Wafer bonding, handling mask aligners, hard/soft baking and RCA wet processing.

• Software skills: MATLAB, Mathematica, HSPICE, C, OrCAD, AutoCAD, FreehandMX, Photoshop, Microsoft Office.

• Excellent communication and interpersonal skills, Experienced with customer relations; Provided IT hardware / Software technical support for the faculty and staff of College of Education,Criminal Justice and Human Resources (CECH) at the University of Cincinnati for 2 years . Required coordinating the maintenance and upgrade efforts of the University’s IT resources.

HONORS AND AFFILIATIONS

• Recipient, University Graduate Scholarship, University of Cincinnati, Cincinnati, Ohio, Sep’06 – Sep’08

• Member, Institute of Electrical and Electronics Engineers. Attended the 2006 IEEE Conference on Nanotechnology, Ohio, Jul’06

• Presented invited case study at the 6th International Convention for students’ Quality Control Circle, Total Quality Mgmt., Dec’03

(Recommendations: Available on request)

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