Director of Product Development - Electrical Engineer

MICHAEL MURRAY

**** ******** ****,*** ****, CA **120

408-***-**** *********@*****.***

Electrical Design Engineer

Excellent academic training: MSEE-Stanford, BSEE-University of Washington. Solid professional experience in the design and development of hardware and software. Background encompasses work in start-up, mid-sized, and large company environments, involving systems, components, and devices. Proven ability to increase corporate competitiveness by helping introduce world class products and make significant upgrades to existing lines.

_______________________Career History/Highlights_________________________

Director of Memory Product Development, MVC, (2003 – present)

Director of DRAM Development, MVC, (1999 – 2003)

Design Manager, Mosel-Vitelic Corp. (1994- 1999)

Design Engineer, Vitelic Semiconductor, (1990 – 1994)

Recruited directly from Stanford by this $2 billion manufacturer of semiconductor memories to perform key role in development of products needed to reverse persistent downtrend in sales. Reporting to Vice President of Engineering, responsible for all aspects of memory design cycle from product conception through final test.

Supervise team of design engineers and layout personnel to fulfill marketing requirements.

Designed all varieties of DRAM memory (FPM, EDO, SDRAM, DDR, DDR2), Pseudo-static memory, Nor-flash, Nand-flash, and embedded flash memories.

Experienced with design of voltage regulators, voltage pumps, band-gap references, and DLL's.

Expert in full-custom digital logic, control paths, decoding, sense-amplifiers, I/O buffers, low-power.

Expert in full-custom physical layout design, tight-pitch cells, floor planning. Write DRC & LVS runsets. Have singlehandedly constructed layout for entire projects.

Responsible for the debug & testing of new products. Assist in product failure analysis.

Increased market competitiveness of numerous existing products, performing redesigns that improved speed, eliminated noise problems, and lowered product costs.

Granted 18 patents in semiconductor circuit design.

Software skills: Cadence, Diva, Dracula, Assura LVS & DRC, Virtuoso Schematic & Layout Entry, Pcells. SKILL & C programming languages. HSIM, Hspice, Verilog simulators.

Co-Op Electrical Engineer, IBM Corporation - Mass Storage Devices, (1988)

Recruited (while undergraduate) as part of co-op program to assist IBM's mass storage operation with the manufacture and test of hard disk drives. Responsible for writing software to support the testing of disk drives, automate the control of testing hardware, and improve manufacturing processes.

Learned C in 2 weeks. Wrote tools to automate R&D and manufacturing operation.

Learned internal IBM operating system shell and wrote assembly language C interface along with documentation.

Advised management on the feasibility of several projects involving motor control and sensor monitoring.

_______________________________Education & Awards_______________________________

MSEE, Stanford University, 1990 (GPA 3.93 of 4.00)

BSEE (Summa Cum Laude), University of Washington, 1989 (GPA 3.92 of 4.00)

U.W. Arts & Sciences Honors Program, U.W. Merit Scholarship, Henry L. Gray Memorial Scholarship,

Beneficial Foundation Presidential Scholarship, Phi Beta Kappa, Officer Tau Beta Pi

Contact this candidate