Ma, Jun
***** ***** ** ***#*** Orlando FL***** USA
Phone #:407-***-****
*********@*****.***
Objective
Independent electrical engineer with extensive qualifications seeks opportunities to do the RF, analog circuits design in the semiconductor industry.
Highlights
Solid background in semiconductor device physics. (CMOS, BJT, LDMOS, IGBT, HfO2, SOI, BiCMOS, and GaAs device physics)
Extensive experience in device modeling tool ((BSIMproplus, Cadence Virtuoso and Spectre, Agilent IC-CAP, ADS, Mentor Graphic design software)
Familiarity with BSIM4, BSIM4 SOI, SPECTRA, ADS, Cadence design environments and model QA tools.
Familiarity with test equipments. (Agilent 4156 analyzer, LCR meter, network analyzer, spectrum analyzer and so on)
Familiarity with RFIC building blocks design including low noise amplifiers, variable Gain amplifiers, fixed gain amplifiers, mixers, voltage controlled oscillators, synthesizers, phase locked loops and necessary support circuitry such as Op-amps, bandgap references and current mirror.
Familiarity with SPICE model parameter extraction and Matlab, Simulink simulation.
Strong research ability, totally three journal paper on electron device.
Experience in semiconductor manufacturing IC design, understanding of fab process, device architecture and RF/Analog circuits.
Experience in RF CMOS, PA modeling, RF/Mixed signal design needs.
Working Experience
03/2009-09/2009 Power Amplifier Designer, Rui Xin Information Technology, Ltd. Guangzhou China.
Do the power amplifier designing work using Cadence software.
2003-2005 Electrical Engineer, Cisco Company in Beijing, PRC.
DC/DC AC/DC converter design, layout and implement I2C function using verilog language.
Research and Projects Experience
2005-Current Graduate Research and Teaching Assistant, University of Central Florida
• Class-E power amplifier design with the operation frequency of 800 MHz and performance study under RF-stress. Base on CMOS technology.
• Class-A, Class-B, and Class-AB power amplifier design with the frequency of 900 MHz and performance study under gate-oxide breakdown effect.
• LNA, MIXER, Dual band LNA, PLL, Dual band mixer circuit’s performance, and the design technique for those circuits.
• Dual band LNA-Mixer combination circuit design with the operation frequency of 800 MHz and 2.1GHz.
• Dual band Class-E power amplifier design with the operation frequency of 850 MHz and 1.7 GHz.
• LC oscillator performance under gate-oxide breakdown and NBTI effect.
• Adder and SRAM performance under gate-oxide breakdown effect.
• RF circuits performance for SOI and High-K device reliability issue.
• RF power amplifiers performance for LDMOS.
• GaN power device and LDMOS device simulation use silvaco tool.
• Sample-and-hold circuit design project for ADC.
• Active high pass filter design using Sallen-Key topology.
• IC design verification software V2sim and Racecheck test for Dynetix Design solution company.
2003-2005 Project for digital circuits design. (CPU,I2C…and other digital module design)
Education
2005-Present Ph.D. Electrical Engineer
University of Central Florida, Orlando, FL
Dissertation: Study Gate Oxide Breakdown Effect on Circuit Performances (Advisor: Dr. Jiann.S.Yuan)
Experiment Experience
2005-Present Devices measurement using probe station, Agilent 4156B parameter analyzer and other Agilent test equipments.
The devices include traditional CMOS, LDMOS, SOI, and High-K device, HfO2.