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semiconductor development engineer

Location:
United States
Posted:
February 21, 2012

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Resume:

PIAO LIU

**** **** ******, #** ********, NY ***** 859-***-**** ********@*****.***

SEMICONDUCTOR FABRICATION & MATERIALS CHARACTERIZATION

Results-oriented engineering professional with qualifications supporting semiconductor process and other related areas. Solid background in materials and physics, as well as expertise in electronic/optical device fabrication and materials characterization. Independent, self-starter with demonstrated ability to take initiative and work effectively with little or no supervision. Well adept at performing both autonomously and collaboratively in fast-paced environments to complete assigned projects while adhering to strict deadlines and design specifications. Possess excellent analytical and complex problem-solving abilities as well as exceptional interpersonal and communication skills to build rapport and strong working relationships with colleagues and superiors.

TECHNICAL SKILLS:

Thin Film Deposition: Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD) including Sputtering, E-Beam Evaporation, and Thermal Evaporation, Close Space Sublimation (CSS), Electrodeposition, Chemical Bath Deposition (CBD), Photolithography

Etching: Reactive Ion Etching (RIE), Ion Milling, and Wet Etching

Thermal Process: Diffusion, Natural Annealing, Rapid Thermal Processing (RTP)

Material & Thin Film Characterization: SEM, TEM, AFM, EDS, XRD, IR, UV-Vis Transmission, Spectroscopic Ellipsometer, Profilometer, Photoluminescence (PL), TRPL, Raman

Device Characterization: Current-Voltage (I-V) Measurement, Capacitance-Voltage (C-V) Measurement, Low Temperature Measurement

Fundamental Knowledge: Semiconductor Physics, Solid State Electronics, HBT, MOSFET, pHEMT, Solar Cells, Schottky Diode, Heterojunction, DOE, SPC, Technical Paper Writing

Software Applications: MATLAB, LabVIEW, Origin, JMP, AutoCAD, and Microsoft Office

EDUCATION:

PhD in Electrical Engineering (Aug 2005-Dec 2010, GPA 3.84)

University of Kentucky Lexington, KY

• Dissertation Topic: Heterojunctions and Schottky Diodes on Semiconductor Nanowires for Solar Cell Application

BS in Electrical Engineering (Sep 2001-Jul 2005, GPA 3.80)

Zhejiang University Zhejiang, China

PROFESSIONAL WORK EXPERIENCE:

City University of New York New York, NY Feb 2011 – Present

Post-Doctorial Research Associate

• Led labmates to design and construct a smart annealing apparatus with fast and controllable heating/cooling rate as well as an in-situ photoluminescence measurement system.

• Enhanced the conductivity of the ZnO:Al window layer by 200% while maintained high transmittivity through optimization of deposition parameters, resulting in an fill factor improvement of 25% for CIGS solar cell devices.

• Wrote LabView programs to communicate with the power supply and digital multimeter to automatically measure the I-V curve and save data to files specified by user.

• Fabricated a new type of thin film solar cell for the first time of the world based on a new direct bandgap material CsSnI3.

• Produced CIGS solar cell devices from sputtering as well as nano-particles based inks. Independently deposited each layer from bottom of the structure to top and achieved more than 13% efficiency.

PROFESSIONAL WORK EXPERIENCE: (CONTINUED)

University of Kentucky Lexington, KY Aug 2005 – Jan 2011

Research Assistant

• Led a 4-person team in designing and building our customized Close Space Sublimation system for thin film CdTe evaporation. Reduced the cost by 50% by proper selecting and assembling parts instead of purchasing a whole system. Constructed the vacuum system, heating system, cooling system, supporting system, loading/unloading system respectively. Fabricated CdTe solar cells of more than 8% efficiency.

• Deposited various metals and dielectrics by sputtering, e-beam evaporation, and thermal evaporation.

• Solved porous alumina template adhesion problem during anodization process.

• Established a Standard Operation Procedure (SOP) for fabrication of barrier-free nano porous alumina template on top of ITO. Demonstrated a 100% filling ratio for deposition of nanowires into the template by top and cross-section imaging.

• Designed, fabricated and characterized CdTe solar cells on top of vertically aligned CdS nanowires. Simulated by MATLAB programming and experimentally demonstrated improved current collection.

• Studied semiconductor physics, material characterization and solid state electronics. Trained on over 30 types of semiconductor fabrication and characterization technologies.

ADDITIONAL INFORMATION:

Awards:

• Research Scholarship, University of Kentucky, Lexington, KY, 2007-2010.

• Teaching Scholarship, University of Kentucky, Lexington, KY, 2005-2007.

• Outstanding Thesis Award, Zhejiang University, Zhejiang, China, 2005.

• Outstanding Student Scholarship, Zhejiang University, Zhejiang, China, 2001-2005.

Professional Activities:

• Member, Institute of Electrical and Electronics Engineers (IEEE)

• Guest editor, Advances in Materials Science and Engineering, Hindawi Publishing Corporation

Selected Publications and Presentations:

• Piao Liu, Vijay P. Singh, Carlos Jarro and Suresh Rajaputra, “Cadmium sulfide nanowires for the window semiconductor layer in thin film CdS–CdTe solar cells”, Nanotechnology, 145304, (2011).

• Piao Liu, Kai Shum, Chivin Sun, Bo Gao and Yuhang Ren, “Method for making Al-doped ZnO films with high conductivity and transmittance”, United States Patent application, submitted (2011).

• Piao Liu, Vijay P. Singh, and Suresh Rajaputra, “Barrier layer non-uniformity effects in anodized aluminum oxide nanopores on ITO substrates”, Nanotechnology, v 21, 115303, (2010).

• Piao Liu, Vijay P. Singh, Suresh Rajaputra, Sovannary Phok and Zhi Chen, “Characteristics of copper indium diselenide nanowires embedded in porous alumina templates”, Journal of Materials Research, v 25, p 207-212, (2010).

• Piao Liu, Zhuo Chen, Kai Shum, Chivin Sun, Bo Gao and Yuhang Ren, “Aluminum-doped zinc oxide thin films by sputtering: Optimization of transmittance and conductivity for solar cell applications”, Thin Solid Film, submitted (2011).

• Vijay P. Singh, Suresh Rajaputra, Piao Liu, Sovannary Phok, and Sai Guduru, “Fabrication and characterization of CdS/CIS nanowire heterojunctions”, 33rd IEEE PVSC conference, (2008).

• Piao Liu, Suresh Rajaputra and Vijay Singh, “Schottky Diodes Based On CuInSe2 Nanowires Embedded in Porous Alumina”, Nanotechnology Symposium, Louisville, October (2008).

• Sovannary Phok, Piao Liu, Suresh Rajaputra, and Vijay Singh, "CIS nanowire and its application in photovoltaics ", MRS Spring meeting, San Francisco, March (2008).

• Piao Liu, Satish Kandala, Sovannary Phok, Suresh Rajaputra, and Vijay Singh, “Nanostructured Tin Oxide and Titanium Oxide For Low Temperature Gas Sensor Applications”, 4th Kentucky Innovation and Enterprise Conference, Lexington, April (2008).

• Vijay Singh, Suresh Rajaputra, Piao Liu, Goutham Chintakula, Sai Guduru, and Sandeep Marda, “CuInSe2 and CuPc Nanowires for Solar Cell Applications”, KYnanoMAT, Louisville, March (2008)



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