CURICULUM VITAE
Anita
Address:
No. *, Ground Floor, RK Shridhar Complex, Nagavarpalya Main road,
CV Raman Nagar, Bangalore - 560093.
Tel. (M):
E-mail:
dza4jx@r.postjobfree.com
Objective:
I seek knowledgeable and competitive work profile, in which I can enhance my learning and can extend my knowledge in electronics system design. I am keen learner and wishful to contribute in an organization with my attained abilities. I have worked extensively in digital design projects in my curriculum; hence I wish to extend my knowledge by contributing to development of similar technology products.
Education Qualification:
Degree / Course College / Institute University / Board Maximum
Marks Marks
Obtained Year of completion Percentage / CGPA
H.S.E. SSM SD School, Uchana Mandi, Jind, Haryana H.B.S.E 500-***-**** 9.0
S.S.E. SSM SD School, Uchana Mandi, Jind, Haryana H.B.S.E 500-***-**** 8.4
Bachelor of Technology (ECE): First Class with Honors
1st Semester JIET,JIND
Kuruksetra University, Kuruksetra 105*-***-**** 69.5%
2nd Semester JIET,JIND
Kuruksetra University, Kuruksetra 105*-***-**** 67.6%
3rd
Semester JIET,JIND
Kuruksetra University, Kuruksetra 115*-***-**** 70.4%
4th
Semester JIET,JIND
Kuruksetra University, Kuruksetra 115*-***-**** 69.4%
5th
Semester JIET,JIND
Kuruksetra University, Kuruksetra 115*-***-**** 79.4%
6th Semester JIET,JIND
Kuruksetra University, Kuruksetra 115*-***-**** 74.1%
7th
Semester JIET,JIND
Kuruksetra University, Kuruksetra 117*-***-**** 74.2%
8th
Semester JIET,JIND
Kuruksetra University, Kuruksetra 117*-***-**** 81.7%
Total Weighted Marks 6180 4627 74.87%
Internship Work Details:
Marine India Pvt. Ltd. (http://www.marineindia.com) 6 weeks in July, 2010
Company Work Profile:
Marine India was incorporated in 1994 with a name Pan Maritime Inc; India for providing technical services to Maritime and Oil & Gas customers.
Marine India product line includes Material Research Equipments, Automation Systems, Data acquisition and processing systems for all applications, power supplies and Repair of all kinds of Electronic equipments and systems. We also undertake PC interfacing of existing equipments, plant and machinery. Development of research equipments as per papers is also our specialty.
Projects:
• Designed basic power supplies with specific voltage and current requirement and studied OP-Amp uses in designing astable, monostable circuitry design using timer ICs.Designed op-amp based integrator, adder, subtractor circuits etc.
Marine India Pvt. Ltd. (http://www.marineindia.com) 6 weeks in July, 2011
Projects:
• Study XILINX ISE Design Suit Software. The basic Arithmetic and Logic Programs is done through the Xilinx, which will give synthesis report, simulation waveforms for the design.
• Design many Project of Digital like Basic Logic Gates, Timer, Counter, Clock Generator, Multiplexer, Demultiplexer, Debouncer, Encoder, Decoder etc.
Curriculum Projects:
• Minor Projects: Micro Controller Based System Caller ID.
It keeps tracking of both Incoming and Outgoing Calls. It has a built in Caller ID. The incoming and the dialed numbers are displayed on the LCD display.
The Microcontroller is used to control the whole system it completely control the LCD display and the DTMF decoder. It gets the numbers through the DTMF decoder and displays it over the LCD (Liquid Crystal Display).
• Major Projects: Designing of 8 Bit ALU using XILINX ISE Design Suite.
This project includes the designing of 8 –Bit Arithmetic Logic Unit and simulating its components using VHSIC HDL. For synthesis purpose the targeted FPGA device used is SPARTAN-3. The device can accept two numbers of 8 bit binary data and can perform logical/arithmetic operation depending on the 4 bit Operation code given. Since ALU is main part of CPU, this arithmetic and logic unit design is very important to know.
The design of ALU is done through the Xilinx, which will give synthesis report, simulation waveforms for the design. Simulation Waveforms for the design are generated by the VHDL Test Bench. The VHDL code for ALU is simulated and synthesized using Xilinx Synthesis Tool. After simulation we generate bit file for the design using Xilinx- impact tool.
Skills:
• Digital Design : VDHL, Active HDL, Xilinx, Electronics System Design and debug.
• Programming : C, Data Structure
• Operating System : MS Windows
• Application Software : MS Word, Excel & Power Point
Achievements:
• Proven excellence in study. Always been in top 3 students of the class throughout academics.
• Got 2nd position in college in 5th semester, 3rd position in 7th semester, 3rd position in 8th semester.
• Participated in School and College cultural festivals.
• Organized many events in school and collage namely Reading competition, Paper Reading, Poster making, debate competitions etc.
Interest and Hobbies:
• Digital and Electronic design, VHDL, Internet Surfing, Listening music.
Personal Details:
• Date of Birth : 13 January, 1992
• Marital Status : Single
• Language Known : English, Hindi and Punjabi