A. Personal Particulars
Name: PHUA POH CHIN
Address: No. 26A, Parbury Avenue, Singapore 467334.
Email: ***********@*******.***
DOB: 19/07/1974
Contact Numbers
Telephone No: +65-64438701
Mobile No: +65-92338458
B. Resume Details
Education
1999 – 2001: Nanyang Technological University
Master of Engineering (Electrical & Electronics).
1996 – 1999: Nanyang Technological University
Bachelor of Engineering (Electrical & Electronic), 2nd Class Honours (Upper Division).
1991 – 1994: Singapore Polytechnic
Diploma in Mechatronics.
1986 – 1990: Bedok North Secondary School
GCE “O” Level with 5 Distinctions.
Award
1999: Awarded National Science and Technology Board Postgraduate Training Initiative (NSTB PTI) scholarship. The scholarship include full subsidize of research fee and an allowance of $2200/month.
Working Experience
1. Oct 2001 to Nov 2010: SILVACO SINGAPORE PTE LTD
Work as an Applications Manager:
a. In charge of a team of applications engineers to provide technical supports for pre-sale/post-sale customers and also distributors’ application engineers in the Asia-Pacific regions.
b. Assist customers in solving process and device related simulation problems for all sorts of semiconductor devices such as MOSFET, BIPOLAR, POWER, Optoelectronics, LEDs, LASER, Solar Cells, FINFET, HBT, HEMT, … etc and Organic devices such as OTFTs, OLEDs, Organic Solar Cells, …etc.
c. Assist customers in SPICE model extraction such as BSIM3 for MOSFET, RPI models for TFT, EKV model for Power devices…etc.
d. Provide demonstration to customers and conduct workshops for Silvaco 2D/3D process and device simulation tools.
e. Involves in beta testing of device/process simulators before releasing the software.
f. Writing Technical papers for company technical publication (Please refer to the “References” section for my published articles.)
For the past 9 years working in Silvaco Singapore, I have gained valuable experience in managing technical staffs, training engineers, working with customers to solve their technical problems, presenting company products to potential or existing customers. In addition, I’ve acquired in-depth knowledge in semiconductor physics theory, device characterization, design of experiments, statistical data analysis knowledge and problem solving skills. I’ve also become very proficient in technical writing.
2. Jul 2000 to Jun 2001: NANYANG TECHNOLOGICAL UNIVERSITY
Work as a Laboratory Assistant (Part Time) who assists lecturers in conducting electronics laboratory sessions for second year undergraduate student.
Professional Skills
a. Semiconductor Simulation Skills:
More than 10 years' of experience in using 2D/3D semiconductor process and device simulation tools such as SSUPREM, S-PISCES, MEDICI, SILVACO VICTORY, Silvaco VWF Automation Tool, SPICE Model Extraction Tools such as Silvaco UTMOST III/IV. Interconnect Parasitic Extraction Tools such as Silvaco EXACT, CLEVER, QUEST and STELLAR.
b. Computer Skills:
Operating System: UNIX, LINUX and WINDOWS.
Programming Language: C programming, MATLAB, Mathematica, Microsoft Office, Visual Basic.
c. Presentation Skills:
Conducted numerous TCAD workshops and seminars for customers in:
Singapore - Data Storage Institute; TECH Semiconductor; ST Microelectronics; Numonyx; Institute of High Performance Computing (IHPC); Institute of Materials Research and Engineering (IMRE); Nanyang Technological University; Singapore Polytechnic; Ngee Ann Polytechnic; Nanyang Polytechnic; ITE College.
China - BYD Company (Shenzhen); Beijing Orient Electronic (BOE) Co. Ltd; Wuhan University; China Electronics Technology Group Corporation (CETC); China Star Optics Technology; Shanghai Jiao Tong University.
Malaysia - MIMOS; XFab; Silterra; Infineon; Universiti Kebangsaan Malaysia; Universiti Teknologi Petronas; University Teknologi Malaysia; IC Microsystems; Universiti Teknologi MARA Pulau Pinang; Multimedia University, Malaysia; Universiti Putra Malaysia.
India - Semiconductor Complex Limited; Integrated Microsystems; Tata BP Solar India Limited; Vishay Precision Group; Indian Institute of Technology (IIT) Delhi; IIT Kanpur; IIT Kharagpur; IIT Madras; IIT Bombay; IIT Roorkee; Calcutta University; Delhi University; Naval Physical & Oceanographic Laboratory (NPOL).
Thailand - King Mongkut's University of Technology Thonburi (KMUTT); Western Digital.
References
1. Name: Ms Kennice Ong
Position: Office Manager
Company: Silvaco Singapore Pte Ltd
Contact: +65-9791 2243
2. Name: Dr. Basil Lui
Position: Former President of Silvaco Singapore
Company: Silvaco Singapore Pte Ltd
Contact: +65-9673 4691
Publications
1. P.C. Phua, “Simulation of Mercury-Cadmium-Telluride Detector Device,” Submitted to Silvaco Simulation Standard for 2010 publication.
2. P. C. Phua, “Simulation of Crosstalk in InSb Detector Arrays,” Silvaco Simulation Standard, Vol. 19, Number 4, pp. 4-7, Oct/Nov/Dec 2009.
http://www.silvaco.com/tech_lib_TCAD/simulationstandard/2009/oct_nov_dec/a2/a2.html
3. P. C. Phua, “Simulating Solar Cell Devices using Silvaco TCAD Tools,” Silvaco Simulation Standard, Vol. 18, Number 2, pp. 1-3, Apr/May/Jun 2008.
http://www.silvaco.com/tech_lib_TCAD/simulationstandard/2008/apr_may_jun/a1/a1.html
4. P. C. Phua, “Simulating the Device Characteristics of MEH-PPV Polymer Light Emitting Diodes Using ATLAS,” Simulation Standard, Vol. 15, Number 5, pp. 5-8, May 2005.
http://www.silvaco.com/tech_lib_TCAD/simulationstandard/2005/may/a2/a2.html
5. P. C. Phua, “The Importance of Mesh Definition in Strained-Si Heterostructure Simulation,” Silvaco Simulation Standard, Vol. 13, Number 2, pp. 11-12, Feb. 2003. http://www.silvaco.com/tech_lib_TCAD/simulationstandard/2003/feb/a4/a4.html
6. Basil Lui, P. C. Phua, Y. Morikawa, K. Rhee, I. Kamohara, A. Nejim, G. Jones, W. French, M. Townsend and B. Cottle, “ TCAD Transient Simulation of Organic/Poly-Si TFT/OLED Pixel,” (invited paper), AM-LCD Conference organized by The Japan Society of Applied Physics, 2003.
7. P. C. Phua and V. K. S. Ong, "Determining the Location of Point-like Defects in the Parallel Junction Configuration with the Use of Electron Beam Induced Current," IEEE Trans on Electron Devices, Vol. 49, No. 11, pp. 2036-2046, 2002.
8. P. C. Phua and V. K. S. Ong, "Determining the Location of Point-like Defects in the Parallel Junction Configuration with the Use of Electron Beam Induced Current," NTU EEE Research Bulletin 2002, pp. 24-25.
9. V. K. S. Ong and P. C. Phua, "Junction Depth Determination by Reconstruction of the Charge Collection Probability in a Semiconductor Device," Semiconductor Science and Technology, U.S.A., Vol. 16, No. 8, pp. 691 - 698, 2001.
10. V. K. S. Ong and P. C. Phua, "Potential Sources of Errors in Electron Beam Induced Current Simulation," Review of Scientific Instruments, U.S.A., Vol. 72, pp. 201-206, 2001.
11. P. C. Phua and V. K. S. Ong, "Extraction of Junction Depth in a Semiconductor Device," The 9th International Symposium on Integrated Circuits, Devices & Systems, pp. 397-400, 2001.
12. P. C. Phua and V. K. S. Ong, "Characterization of Errors in EBIC Simulation," NTU EEE Research Bulletin 2001, pp. 24-25.
13. P. C. Phua and V. K. S. Ong, "Determination of the Junction Depth of a Semiconductor Device by the Reconstruction of the Charge Collection Probability, " IEEE Conference on Optoelectronic and Microelectronic Materials and Devices (COMMAD) 2000, pp. 523-526, 2000.
14. V. K. S. Ong and P. C. Phua, "Determining the Transport Properties of Silicon with the Use of EBIC," The 8th International Symposium on Integrated Circuits, Devices & Systems, pp. 34-37, 1999.
15. P. C. Phua and V. K. S. Ong, "Potential Pitfalls in Electron Beam Induced Current Simulation," The 8th Scientific Conference of the Electron Microscopy Society, pp. 80-82, 1999.