Career Objective
To work in a competitive and healthy environment which provides an opportunity to upgrade my skills and take up new challenges beholding bigger responsibilities and to be apart of the company’s progress.
Educational Synopsis
M.Tech in VLSI Design (ECE) from Gitam University College during the period (2009-2011) with a CGPA of 8.73.
B.Tech in Electrical and Electronics Engineering from Raghu Engineering College during the period (2004-2008) with an aggregate of 73.71%.
Intermediate from Vikas Junior College during the period (2002-2004) under Board of Intermediate Education with an aggregate of 89.70%.
S.S.C from Mohan Secondary School during the period (2001-2002) under State Board of Secondary Education with an aggregate of 86.33%.
Technical Skills
Operating systems : Windows, Linux
Programming Languages : C,SAP – ABAP/4 (ECC 6.0), Verilog
Tools : Cadence tools, ModelSim, Tanner tools
Professional Experience
Currently working as an intern in Sicon-tech(VLSI) ,Hyderabad.
Worked on front end analog design in ANURAG (DRDO) as a Project Trainee, from 5th August 2010 to April 30th 2011.
SAP - ABAP training from Reliance Global Services Private Limited Since
August 2008 to May 2009.
Strengths
Ability to work in groups as well as individually.
A Fast learner and quick in adapting to newer technologies.
Ability to work hard and to take challenges.
Extracurricular activities:
Vocational training in thermal power plant department from ‘Visakha Steel Plant’.
Completed Visharad Purvardh from Dakshin Bharat Hindi Pracharsabha, Madras.
Paper presentation on Effective control of Utah Artificial Arm (robotics development).
Presented International Conference Paper on “Design Of High Speed Current-Steering Digital to Analog Converter”.
M.Tech Project Summary:
Title : Design of High-Speed Current-Steering Digital to Analog Converter
Organisation : ANURAG (DRDO), Hyderabad
Tools : Cadence & Matlab
Description
A CMOS current-steering DAC is the usual choice for high speed applications. Design of 12-bit, 2 GS/s 4:1 MUXDAC targeted for DDFS (Direct Digital Frequency Synthesis) systems. This IC is being designed using UMC 0.13-µm CMOS technology. The required output sine wave is stored in a RAM table as a sine function in digital form The RAM's digital sine output is converted to an analog sine wave by a DAC. The steps seen at the DAC output are filtered by a low pass filter to provide a clean sine wave output. The frequency of the sine wave depends on the rate at which addresses to the RAM table are changed.
The low clock LCLK and 4 data channels A<0:11>, B<0:11>, C<0:11>, D<0:11> are using LVDS Rx which works at 500 MS/s. The LCLK clock is used to latch the 4 input data channels at 500 MS/s. Then, one of the four channels is selected using a 4:1 MUX which works at 2 GS/s. This DAC utilizes segmented current source architecture of 8 MSB and 4 LSB to reduce the glitch energy and achieve good linearity. DAC differential outputs are terminated on 50Ω resistors to get a differential output swing of 1V. INL and DNL are measured using Matlab simulations.
Mini projects in M.Tech
Design of 26T full adder layout using tanner tools
UART (Universal asynchronous receiver & transmitter)
Tools : Xilinx 8.1, ModelSim 6.0
Description
Most computers and microcontrollers have one or more serial data ports used to communicate with serial input/output devices such as keyboards and serial printers. By using a modem connected to a serial port, serial data can be transmitted to and received from a remote location via telephone lines, the serial communication interface, which receives and transmits serial data.
B.Tech Project Summary:
Title : Speed Limit Alert
Role : Team leader
Team Size : 5
Description
This circuit has been designed to alert the vehicle driver that he has reached the maximum fixed speed limit. It estimates the necessity of looking at the tachometer and to be distracted from driving.
To achieve this we have used various sensitive components like trimmer resistors, miniature inductance, LEDs, piezo-sounder etc., CA3140 is used here which acts differential amplifier amplifying the electro magnetic signals sensed by miniature inductance earlier. IC LM339 is used to reduce the noise present in the amplified signal. IC 4098 provides the required time delay to display the sensed signal. Its outstanding feature lies in the fact that no connection is required from circuit to engine.
Personal Details
Name : N.R.L.Chengalva
Father’s Name : N.Vasudevarao
Nationality : Indian
Languages known : Telugu, Hindi, English
Date:
Place: N.R.L.CHENGALVA