Design Quality Control

CAREER OBJECTIVE

Pursuing Masters in VLSI system design and Disciplined Graduate in Electrical and Electronics Engineering having good knowledge in design concepts, handling synthesis tools and timing analysis tools. Possess good communication and interpersonal skills.

Area of Specialization Semi custom physical design, verification, synthesis-DFT

Personal Details Date of Birth 04th sep, 1987

Marital Status Female, Single

TECHNICAL SKILLS

HDL Verilog, System Verilog

HVL System Verilog

Scripting Language Perl, Shell, TCL

Tools Used Cadence Virtuoso, Design Compiler, VCS,DFT Compiler, Prime Time, IC Compiler, Orcad, Xilinx ISE, Model Sim, Questa Sim,

Protocols Known USB, PCI, AMBA, PCI Express, JTAG

Platform And Devices ASIC, SOC, FPGA, Microprocessor

WORK EXPERIENCE

Designation Company Period

Technical support associate Aditya Birla Minacs, Sarjapur road, Bangalore. July 2010-

October 2011

PROJECT WORK

Project Title: Intelligent Traffic Light Controller in Verilog as well as in System Verilog

Duration: 4 months

Strength: 1

Objective: Traffic light Controller with a timer module has been designed that takes the inputs from the eight sensors to allow controller to determine without human intervention, a certain traffic light should be at GREEN, YELLOW, or RED for a longer or shorter period before switching to another color. Traffic crossing the interchange junction needs to be regulated by a traffic light system in order to enable a smooth and safe interchange crossing for motorized vehicles.

Platform: ASIC

Tools Used: Design Compiler, VCS, Prime Time, DFT Compiler (Tetra Max), IC Compiler

Detail: For Designing and Implementation of Traffic Light Controller in ASIC Platform, ASIC Semi-Custom Flow is adopted. Design is synthesized in 65 nm Technology and Timing is verified in Prime Time. Functionality has been verified in System Verilog Environment. Scan Chain also inserted in Netlist for DFT. For Implementing Chip Level Netlist is taken to Physical design and inserted Pad Cells.

Conclusion: After following all the steps of ASIC Design Flow 70% functional coverage and 98% DFT coverage has been obtained and both Pre layout and Post Layout Simulation are meeting the timing.

ASSIGNMENTS HANDLED

1)Design and integration of 6T SRAM memory design with I/O pad

Design of full custom memory with 6T CMOS cell configuration was modeled using cadence virtuoso 6.1.4 version. The integration of design was also carried out with I/O pads and results were analyzed and estimated the total chip area for the design.

2) Design and development of FPGA based automatic power supply controller and implementation

Nowadays automatic controllers are becoming more popular due to its reconfigurability, power saving options, less external passive components, less sensitive to temperature variations and its high efficiency. Development of commercial electronic products requires development of prototypes on embedded controllers. Design and development of FPGA based automatic power supply controller is carried out to control the complete power supply of department consisting of seven members.

3) ASIC design and low power implementation of tank water level control system

Tank water level control system consists of Finite state machine. An FSM is a sequential circuit with arbitrary next state logic. An abstract model derives a FSM such as a state diagram. Low power methodologies have been discussed and suitable low power methodology is used as well. Results have been analyzed.

PAPERS AT GRADUATE LEVEL

“Power Quality and Harmonics in Power System” in national level students technical Symposium at Shridevi Institute of Engineering and Technology, Tumkur.

“Indoor Air Quality Control in Natural Ventilated Environment using Fuzzy Logic Controls” in state level technical Symposium Spark mania -2009 at Don Bosco Institute of Technology, Bangalore.

BE PROJECT

Labview based energy saving control for air conditioning system using fuzzy logic approach

Lab VIEW, short form of Laboratory Instrument Engineering Workbench, is a programming environment in which programs using a graphical notation can be created. It differs from traditional programming languages like C, C++ or JAVA, in which programming is done using text. The IR sensor is present in the entrance to detect the number of persons entering n leaving the room. If the count exceeds a certain limit, the devices like fans, lights, air conditioners etc are switched on automatically. The resistor temperature dependant (RTD) detects the temperature of the room. If the temperature rises, the air conditioner gets on & adjusts its value. The light dependant resistor (LDR) sensor is used to detect the day or dusk & according to that the lights will be on. The gas sensor detects the presence of harmful gases & the exhaust fan will be switched on at once. The energy is thus conserved.

EDUCATION

Qualification Institute Year Marks M.Sc [Engg in VLSI]

M.S.Ramaiah School of Advanced Studies, Bangalore Pursuing (2011-2013) 60%(till dated)

B.E

SJB Institute of Technology, Bangalore 2005-2009 64%

PUC National PU college, Bangalore 2003-2005 60%

SSLC National High School, Bangalore 2003 64.14%

PASSPORT DETAILS

Passport No - H3028876

Date of Expiry - 18 march 2019

PERSONAL DETAILS

Father Name - Mr. H. Muniraju

Languages known - Kannada, English, Hindi

Nationality - Indian

Declaration

I do hereby declare that all the information furnished above is true to the best of my knowledge and belief.

Place: Yours Sincerely,

Date: (Bhavya M)

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