Engineer Project

Viraj Jigar Gosalia

Cell-Phone: 319-***-**** Email: ************@*****.***

Experience Summary

• Extensive experience of around 4 years in Automated Test Engineering (ATE) at Rockwell Collins.

• U.S. Citizen and able to get security clearance.

• Experience includes Hardware Designing, Automated Test Equipment and Test Option development with System Integration for Factory, Service centers and Airline customers at Rockwell Collins.

• Experience involves planning, analyzing, designing, executing and documenting test solutions (test plans, test cases and test procedures) of various communication products with limited and high complexity for commercial and regional aircrafts.

• Successful contribution in engineering estimates of product test solutions that reduces cost, improves schedule and technical performance of the project.

• Work experience at various stages of the Development of Product test solution such as Capturing requirements, Analyzing customer needs, Designing Test solution, System Integration and supporting production/customers.

• Strong understanding and extensive experience of Schematic Design and reading, Multi-Layer PCB Layouts, Circuit Card Assemblies(CCAs) and Signal Integrity Analysis using Hyperlynx

• Strong understanding and Good experience of Requirements Management tool DOORs to capture requirements, Track requirements, Link Requirements between Modules, Create Validation and Verification Matrix.

• Good Experience of designing Test Solutions and writing Papers for Standard bus Signals (Ethernet, RS422, ARINC 429, Discrete, AC.DC Power) Testing Methodology.

• Comprehensive Knowledge of Unix/Linux Operating systems and shell scripting

• Experience in designing wire chart (NEC Codes), Test Fixtures and System Level Schematics/Block Diagram.

• Liaise between cross-functional teams (internal and external) to capture requirements and develop specifications for production test.

• Good knowledge of VLSI, ARINC Standards, Lean Electronics, Configuration Control, System Engineering and Lifecycle Management of Product.

• Results driven and accomplished engineering professional experienced at working in fast paced

environment demanding strong organizational, technical and interpersonal skills.

• Excellent communication and interpersonal skills to coordinate tasks with peers, colleagues and off-shore team to produce best results.

• Ability to work on multiple assignments.

Technical Skills

Testing Tools (Systems) : Integrated Test System (ITS), Radio Frequency Test (RFT) system,

Flex Auto, RSD Lite, PST Phone Programmer, Radio Comm

Electrical Design : Cadence Virtuoso Schematic and Layout Editors, Mentor Graphics

(ePD), Hyperlynx, Canvas, Internal Component Selection Tools and

Specification Request, Processes for new components, BOM Creations

and Engineering Change Orders (ECO)

Requirements Capture : DOORs

Simulation Tools : MATLAB, OPENT, GLOMOSIM, COCOMOII,LABVIEW

Languages : Turbo Atlas, Microprocessor, Microcontroller and EEPROM

Programming, VHDL

Scripting Languages : UNIX Shell Scripting

Packages : Microsoft Office Suite (Word, Excel, PowerPoint, Project and Visio)

Operating System : Windows 9x/2000/XP/Vista, Unix/Linux

Version Control : PREP, Subversion, Clear quest

Lab Equipment : DMM, Oscilloscope, Network Analyzers, Video Generators

Other : Technical Consistent Process for Design and Development, Design to cost, EMI control during PCB Layout and System Design, Fundamentals of System Engineering, Capture Originating

Requirements, Introduction to VHDL, Lean Electronics, Lean cause

and Effect, Lean principles, Communication and Presentation skills at

workplace

Academic Qualification

University of Southern California, Los Angeles Graduation Date: Dec. ‘07

Masters of Science in Electrical Engineering

Nirma Institute of Technology & Science, Ahmedabad, India Sept. ‘01 – Jun ‘05

Bachelor of Engineering in Instrumentation & Control

Relevant Coursework

• Computer Architecture: Register transfer level machine organization, Single and Multicycle CPU Implementations of non pipe-lined processors, cache and virtual memory

• Microprocessor: SRAM , EPROM using larger memory from smaller memory chips, memory interfacing to 8086/8088, memory interface with 16bit/32 bit processor, clock generator, wait state generator, timing specification for memory and microprocessor, interrupt controller 8259, PPI 8255A, timer/counter 8252A, bus arbitration, byte swapping

• Testing: Logic simulation, Fault simulation, test generation (ATPG), Design for Test (DFT), Built in self test (BIST), boundary scan

• Digital Electronics: Combinational Logic, Sequential Logic, State Machines, Flip-Flop, Latch, Counters

• Basic Electronics: Logic Gates, Diode Circuits, Active/Passive Filters, Amplifiers

Project Profiles

Rockwell Collins, Cedar Rapids, IA March ’08 – Till Date

Test Equipment Engineer/Test Option Developer

1. Information Management On Board (IMO)

Project Description:

Information management on board (IMO) is an infrastructure composed of hardware resources, software operating system and basic services on commercial aircraft. It is being used to communicate with different equipments within an aircraft and to store f1ight data for future use. It consists of two cabinets, each having different modules inside of them for communication within an aircraft.

Roles & Responsibilities: Test Option Developer & Lead Engineer for Requirements Capture

• Liaise between Design Engineering, Test Engineering and off-shore teams to capture requirements and develop specifications for Production Tests.

• Discuss requirements with customers, system engineers to develop the product for DFT.

• Assist Project Engineer to develop a schedule, create milestones and estimate cost.

• Designed Test Solutions for standard signals: 100 Base Ethernet, 1000 Base-BX, HDVI, RS422, ARINC 429, Discrete and Power.

• Responsible for creating Schematics, Wire chart with NEC Code, Laying out multi-layer circuit boards and coordinating drafting activities with Drafter.

• Handle and co-ordinate the tasks of creating assembly drawings for Test Fixtures, Billing of Materials (BOM) and Engineering Change Orders with Mechanical Engineers

• Assist lab technicians to build Test Fixtures and Adapters.

• Select the equipments for Automate Test Station, install them and perform system integration.

• Execute test, collect results and evaluate them.

• Undertake other tasks and responsibilities to achieve project objectives like managing and coordinating working sessions net meeting, video conferencing as require to resolve issues.

• Support the Test Solution for Factory, Service Centers and Airline customers.

2. Very High Frequency Integrated Radio (VIR) -130 and Information Management System(IMS)-3500

Project Description:

Design and document an Automated Test Solution for VIR-130 and IMS 3500.

Roles & Responsibilities: Lead Hardware Design Engineer

• Assist Project Engineer to develop a schedule, create milestones and estimate cost.

• Responsible for creating Schematics and Wire chart with NEC Code.

• Handle and co-ordinate the tasks of creating assembly drawings for Test Fixtures, Billing of Materials (BOM) and Engineering Change Orders with Mechanical Engineers

• Assist lab technicians to build Test Fixtures and Adapters.

• Undertake other tasks and responsibilities to achieve project objectives like managing and coordinating working sessions net meeting, video conferencing as require to resolve issues.

• Support the Test Solution for Factory, Service Centers and Airline customers.

3. Modular Configurable Automated Tester (MCAT) – 4000

Project Description:

The MCAT-4000 Test Systems are test consoles which provide testing for RF navigation, communication, and a variety of digital avionics equipments. The MCAT-4000 has RF, power, and digital switching capabilities, along with a switch matrix interface.

Roles and Responsibilities: Electrical Engineer

• Responsible for capturing Most Important Requirements, Customer Requirements and Operational Requirements to design an Automated Test Station and Develop Requirements Document with validation and verification traceability matrix.

• Undertake other tasks and responsibilities to achieve project objectives like participating in reviews with senior engineers, customers and managers.

4. Power Verification Test Unit Adapter (TUA):

Project Description:

The power verification TUA verifies the performance of the calibrated power supplies (both AC & DC), Electronic loads, and Power Interrupt Panel (PIP) in the MCAT-4000 station. Verification software runs in the station to verify that all power supplies, Electronic Loads, and PIP are wired up correctly and operating as per the manufacturer’s specifications. Test programs are used to initiate all verification tests.

Roles and Responsibilities: Lead Hardware Design Engineer

• Responsible for capturing Functional Requirements to design a TUA

• Design a schematic based on requirements and develop Hardware Design Document.

• Handle and co-ordinate the tasks of creating assembly drawings for Test Fixtures, Billing of Materials (BOM) and Engineering Change Orders with Mechanical Engineers

• Assist lab technicians to build the Test Fixtures or adapters.

• Undertake other tasks and responsibilities to achieve project objectives like selecting components, managing and coordinating working sessions net meeting, video conferencing as require to resolve issues.

Academic Projects

Motorola, Libertyville, IL May’07-Aug’07

CDMA System Test Engineer (Intern)

Adding Browser Coverage to Panic Bench Testing

• Create FlexAuto methods for Verizon, Row and Smart (Windows) phones.

• Test and debug FlexAuto methods on Panic bench

• Execute tests and collect results

Executing and debugging W2BI bench for System Determination, E911 and ERI test suites

• Configure CDMA phone by setting different parameters to execute test suites using QuickProbe.

• Configure W2BI bench by configuring spreadsheets to execute test suites

Simulation of IEEE 802.15 using Glomosim April ‘06

• Simulate and analyze MAC layer mechanism in IEEE 802.15 to evaluate its throughput.

• Compare the simulated throughput and analytical throughput.

Simulations using OPNET April ‘06

• Simulate the performance of Ethernet Networks.

• Analyze the performance of different LANs connected by Switches and Hubs.

• Simulate the performance of routing Information Model based on Distance-vector and link state algorithms.

• Simulate the effect of ATM adaptation layers on performance of the network.

Serial Communication Using CAN Protocol Dec. ‘04- Jun ‘05

• Establish the communication between two PCs or PC and remotely Located Instrument using

CAN protocols.

• Transmitter and Receiver are connected on same CAN Bus and they use CSMA/CD for any

collisions.

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