Customer Service Project

Subrahmanya Ramaswamy

*** * ****** ** *** *** Phone: 817-***-****

Arlington, TX-76013 E-mail: *****.******@*****.***

OBJECTIVE: Seeking Full Time position to exhibit my Embedded & Communication Systems Knowledge and be a valuable asset to the company.

WORK EXPERIENCE:

Research Assistant Aug2011-Till Date

Embedded Systems and Instrumentation Lab, UTA, Texas

• Design and development of general purpose Embedded Acquisition System for Transportation application.

• Designed and interfaced the Ro-Line laser to the Altera FPGA DE2-115 board.

Embedded Software Developer-Student Jan2012-May 2012

Research in Motion, Irving, Texas

• Worked on BlackBerry playbook device as embedded software developer, executing various types of software integration and tests like firmware upgrade/downgrade, capturing different types of logs like slogs, QXDM logs, sanity testing, battery level testing, regression testing on live air SIM and with CMW500.

Student Assistant at UTA post office Aug 2011- Dec 2011

• Customer services and Responsibilities as a cashier.

• Inventory and Database management

Associate System Engineer June 2008 to Dec 2010

IBM India Pvt LTD, Bangalore, India

• Worked in a data warehouse team, to organize electronically all data and designed to facilitate reporting and analysis.

• Worked on Product Offer Rationalization, an application which calculates the number of customers using the POR service and also calculating the call charges of each POR customers.

• Worked on RYL: Tax Audit Mart, an application which provides the TAX Audit data in the Fact tables.

TECHNICAL SKILLS:

• Programming Languages: C, Shell Scripting, Assembly (Intel 8085, 8086, 8051, 33F PIC)

• Bus Protocols: I2C, SPI, RS-485, RS-232, CAN

• Development Tools: Visual Studio, MPlab IDE

• Operating Systems: Windows 7/Vista/XP, Blackberry QNX, Linux, Macintosh, Sun Solaris10, AIX

• Wireless standards and protocols: GSM, CDMA

• ETL Tools: Informatica 8.x

• Database: Oracle, Teradata

• Other Tools: Matlab,Quartus II, NIOS 2 IDE, QXDM, QPST, QCT, QNX Momentics, Perforce, Code Collaborator,Microsoft Office, IBM Lotus Notes, Rational Portfolio Manager (RPM), SQL Developer, Toad, Eagle CAD.

EDUCATIONAL QUALIFICATIONS:

• Master of Science in Electrical Engineering Jan 2011- Dec 2012

University of Texas at Arlington, Texas, USA (CGPA: 3.77/4.0)

• Bachelor in Engineering Nov 2004 - June 2008

Instrumentation Technology (First Class with Distinction)

Visvesvaraya Technological University, MSRIT, Bangalore, India

ACADEMIC PROJECTS:

Design of CAN protocol based Device Controller using PIC 33FJ128MC802

• The goal of the project was to build CAN based bidirectional communication system. The project consisted of two separate designs – a Controller and a Peripheral node using PIC 33FJ128MC802.

• The Peripheral node extracted information out of the asynchronous data stream and controlled one or more devices.

Tools: MPLAB, Implemented in Assembly and C.

Eight Stage Pipelined Microprocessor Architecture Design

• Designed a 32-bit microprocessor based on Harvard architecture. The project implemented on an 8-stage pipeline architecture with structural, control, and data hazards handling capability. All instructions are 32 or 64 bit long.

• The necessary signals and modes of operation of the microprocessor were also designed.

Cache Memory Controller Architecture analysis

• A RAM of 16MB is interfaced to a cache memory of size 16KB using a 16-bit bus interface.

• An analysis was carried on to bring out the best possible cache architecture in write back, write through allocate and write through non-allocate modes for a cache controller that interfaces a microprocessor used for SDRAM.

Tool: Visual Studio

Design of SDRAM Controller for 80386Sx Processor

• The goal of the project is to design an SDRAM controller that allows SDRAM memory to be interfaced with a microprocessor having only asynchronous memory support.

• Hardware design included 80386Sx processor, Address latches, Data buffers, Bus controller, MT48LC4M16A2 Memory, Clock generation, SDRAM controller.

Design of MIMO physical layer communication system

• Designed a QPSK based Multiple Input Multiple Output (MIMO) wireless communication system using Space Time Trellis Coding and a Rician channel modeled using Jake’s Model.

Design of Digital Communication System

• The goal of the project is to design a physical layer simulation reference system for a digital communication system, a fixed wireless local area networks (WLAN).

• Designed a channel equalizer using MLSE (Viterbi algorithm) with channel coding and without channel coding using BPSK modulation.

Comparison of Rate versus Power Control in CDMA and CDMA2000

• The goal of the project is to evaluated and compare rate versus power control in IS-95 (a CDMA standard for 2G wireless communications) and CDMA2000 1 EV-DO. Applied the following different schemes:

Channel inversion power control for IS-95

Equal power allocation for CDMA 2000

Waterfilling power control for CDMA2000

The performances of the above schemes are compared using SISO, SIMO, MISO and MIMO techniques for IS-95 and CDMA2000 (choosing M=2 and M=4) for two cases:

Full Channel Side Information (CSI)

Channel Side Information at the Receiver (CSIR)

Design of Versatile MUX using Microcontroller

• The goal of the project is to design a versatile c8051F005 micro-controller capable of handling analog signals.

HONORS and ACTIVITES

• Was awarded Thanks Awards from Onsite team/customers for the outstanding performance at IBM.

• AIX Certified by IBM.

• Customer Service Certificate from UTA.

• Active member in Fine Arts Society (FSI), UTA.

• Appreciated by IBM management for organizing cultural events.

Relevant Course Work: Embedded Systems and Microcontrollers, Microprocessors Design, Advanced Microprocessor Design,Wireless Communication, Digital Communication, Information Theory and Coding,, Advanced Wireless Communication, Digital Signal Processing, Real Time Data Acquisition systems.

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