Quality Engineer

JEFFERSON SUN

*** ****-**** *****, ********, CA 95008

Tel: 408-***-**** (H), 408-***-**** (Cell)

E-mail: ************@*****.***

SUMMARY:

• Extensive knowledge of manufacturing process, quality control in the fields of PCB assembly, system/box build integration, and machining. Experiences at semiconductor, display and solar equipment industries under R&D, prototype, and volume production environments.

• Proficient in ISO-9001, DOE, SPC, statistical data analysis.

• Domestic and overseas experience in supplier developing, qualification, and management.

• Strong communications skills, aggressive, willing to take challenges, team player.

EXPERIENCE:

2006 – Present, Sr. Supplier Developing & Quality Engineer, APPLIED MATERIALS, Inc., Santa Clara, CA.

• Supplier process developing, qualification, product quality sustaining.

• Developing and maintaining product quality standards, specification, PQP, inspection methods and procedures.

• Design review for manufacturability and quality compliance.

• Process and system audit, SSQA, technical assessment, FAI qualification, quality and performance improvement. Corrective action (8D/SCAR) implementation/verification.

• Failure analysis of material and products failed at suppliers and fields. FMECA. Coordinating various functional groups, providing response with root cause and solution.

• Supporting production and system operation. Providing solutions for design, manufacturing and quality related issues. Facilitating problem solving at supplier manufacturing.

• Coordinating incoming and source inspection, MRB process, and reporting.

2003 – 2006, Sr. Quality Engineer, KULICKE & SOFFA INDUSTRIES, Inc., San Jose, CA.

• Working at test division, the production of wafer testing probe cards (Cantilever and Vertical).

• Troubleshooting and failure analysis for products or nonconforming material rejected or returned from field (RMA). Coordinate with customer and function groups to work out root cause, responsibility and solutions. Providing failure analysis and solution reports as well as rework instructions/procedures.

• Various projects on products/process quality improvement. Data analysis and reporting for products quality performance and process capability (Cp, Cpk).

• Testing/inspection equipments and meteorology evaluation. Measurement/testing system capability study (gauge R&R).

• Coordinate quality system audit, corrective action implementation and effectiveness verification.

• Supplier quality driving and management: Material spec and vendor quality plan review, first article and pilot build qualification, creating sampling plan and IQA procedures for incoming inspection (PCB, electronic and mechanic parts/assemblies), MRB/SCAR process for nonconformance, supplier quality system and process auditing and qualification, supplier performance (OOBQ, technology, OTD, cost, etc) evaluation and report.

• Supervisor of final QA group. Responsible for technical specifications, inspection procedures, MRB processing, as well as daily operation schedule, performance review, and cross group communication.

2000 – 2003, Sr. Quality Engineer, CELESTICA, Inc., San Jose, CA

• Develop quality plan. Support PCB assembly (SMT, wave soldering, touch-up, mechanical assembly, and testing.) and system/box build integration for DFX, process setup, inspection and quality improvement, defects and yield tracking/reporting.

• Interface with customers for DFM and product quality activities. Reliability and failure/root cause analysis for process/product failures. Coordinate RMA. Evaluate and drive corrective actions (CAR) and continuous improvement for process/product nonconformance.

• Material inspection, testing and quality control in accordance with AVL, IPC and other industrial standards, BOM, corporate and customer specification. Interface with supplier, coordinate MRB, drive and evaluate supplier corrective action (SCAR) for material nonconformance. Supplier process audit, performance evaluation and material qualification.

• Responsible for Six-sigma, SPC implementation at production lines. Statistical data analysis. Process capability (Cp, Cpk) evaluation. Testing/measurement system capability study (Gauge R&R). DOE, POV and correlation analysis for appropriate equipment and process optimization.

• Participate all quality system audit activities, including internal ISO-9000/2000, TL-9000, and ESD audit. Supplier quality audit, and customer on site audit.

1999 – 2000, Quality Assurance Engineer, TYCO/ELCON Products International Co. Fremont, CA.

• Process and product quality control and improvement of connector manufacturing: plastic injection molding, stamping, and mechanical assembly. Interface with supplier for material quality issues. Implement internal and supplier corrective actions, and supplier performance evaluation/qualification.

• Support the ISO quality system and activities concerned with design, application, material handling and production in connector manufacturing company. Maintain all company’s activities compliance with ISO-9001 standard and certification. Planning and conducting internal quality system and supplier quality audits.

• Responsible for Statistical process control (SPC) training and implementation in production line. Process and quality data collection, analysis, and report.

1997 - 1999, Manufacturing Process Engineer, READ-RITE Corporation, Milpitas, CA.

• Design review, new process development, implementation and training for disk drive AMR/GMR recording head prototype manufacturing. Transfer new process into volume production.

• Support productions: Process quality control (SPC), troubleshooting, failure analysis; and yield improvement. The job also involved system program maintain/upgrade (Visual Basic, C++), equipment maintenance, and ISO-9000 compliance.

• Projects: Auto lapping stripe height / MR resistance sigma reduction and process algorithm / parameters optimization (DOE); ESD control; Stripe height grinding implementation and qualification; Ultrasonic auto wire bonding; Lapping tool and fixture redesign.

1992 - 1997, Process Engineer, UniSil Corporation, Santa Clara, CA.

• Worked at wafer substrate manufacturing process: Grinding, Lapping, Polishing, Cleaning, and Inspection.

Focus issues: Flatness and surface quality (finish, haze, particle and surface trace metal contamination) improvement.

• Introducing new products into production: products specification review; process developing and setup; create process procedures/instruction and tools/fixtures design.

• Process quality plan; troubleshooting; failure analysis; experiment design (DOE) and yield improvement; operator training.

Other Professional Experience:

• Three years experience in machining and equipment maintenance. Four years in mechanical design.

COMPUTER SKILLS ACQUIRED:

• Microsoft Word, Excel, PowerPoint, Access, Project, AutoCAD, POV and DOE Engine, JMP, NWA Quality Analyst, SAP, Oracle.

EDUCATION:

Master of Engineering in Mechanical Engineering. Southeastern University

Master of Science in Statistics. Indiana University of Pennsylvania

Certificate of ISO-9001 Quality System Lead Auditor

Special training program on following subjects:

* ISO-9000 Quality System Lead Auditor *8D *SSQA *FMECA * TQM

* Measurement System Analysis * DOE * POV * ESD Control * Software Testing * GD&T

REFERENCE: Available upon request.

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