Engineer Design

Kevin Cheung 408-***-****

***************@*****.***

OBJECTIVE: To secure a challenging position as a Hardware Engineer or member of the Technical Staff.

EXPERIENCE:

Extreme Networks Inc. Santa Clara, CA (Jan. 2003 – Apr. 2010)

Hardware Engineer responsible for HW product specifications, validation test plans, and

Management overview of the HW design teams of ODM partners. These were for major revenue drivers for the company that included Summit X450, Summit S400 Series, and XGM modules. Responsibilities included Perform Design Verification and Validation tests in compliance to internal and industry standards ( IEEE 802.3, IEEE802.af, 802.3at and other safety standards ) Augmenting these responsibilities were oversight of Failure Analysis functions, HW support on sustaining products, and extensive customer interface. Major accomplishments included:

Design of the industry first 24 10 GigEthernet 1U switches (X650)

Industry first POE + IEEE 802.3at switch (X460)

First switch product compliance to the ITU-G8262 synchronous Ethernet specification

(X460)

In charge of development and production release of 8 product series and over 30 models of products that accounted for over 65% of company revenues.

Yield targets were consistently met or exceeded reaching beyond 90 percent with the RMA percentage lowest in company history due to a robust and rigorous design methodology.

Responsible for significant cost savings and meeting target dates for product delivery.

Awarded twice (2) the prestigious VPG award for performance. (Volume Product Group.)

Mentoring including internal training for new product introduction and sales/customer

advocacy.

IOSPAN Wireless Inc. (Start-Up) San Jose, Ca (May 2000 – Oct. 2002)

Digital Hardware Engineer responsible for redesign of channel module mixed signal base stations.

Additional responsibilities including performing all timing and signal integrity analysis on PCB designs

and prototype debug for CPE digital boards. Augmenting these responsibilities were documenting test

procedures; analyzed and resolved CPE failures during limited production runs; modified/maintained

Verilog test codes for FPGA test procedures. Major accomplishments included:

First company to incorporate the MIMO (Multi-input and Multi-output) non-line of sight technology for internet deployment. Redesigned Channel Module mixed signal Base Station boards.

Redesigned MPC860 PowerPC based Base Station Controller Module board.

Redesigned MPC855 PowerPC based CPE board.

Designed Broadcom based 10/100 FE adapter board for CPE testing.

Rae Systems Inc. Sunnyvale, California (Oct 1998- May 2000)

Product Engineer responsible for HW product specifications, validation test plans, layout and design

rules for products. Managed and had oversight of the HW design of ODM partners. Performed QA and

failure analysis on released product and supported these products for customer production. Supported

compliance testing for UL certifications. Accomplishments included:

Developed a high sensitivity toxi gas sensor gas detector PPBRAE. (The industry first PPB level detector)

Development of various new products with Shanghai teams including taking new products from engineering release to production ready.

Worked on new hand-held products including completion of PCB design.

Mentoring and training of manufacturing and QA personnel.

EDUCATION: B.S. Electrical Engineering with a minor in Computer Science

San Jose State University, San Jose, California

TECHNICAL EQUIPMENT: Expert with Oscilloscope, Logic Analyzer, Spectrum Analyzer, Network

Analyzer and Ixia.

SKILLS: Skills include simulation Tools Hyperlynx, Agilent ADS simulation, Cadence Allegro,

PowerPCB, and all Microsoft Suite products. Modified PCB layout using Cadence Allegro, schematics

capture and layout changes using Protel.

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