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Project Engineering

Location:
Rajahmundry, AP, 533102, India
Salary:
2-4 laks per annum
Posted:
September 06, 2012

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Resume:

SIVA NAGU T

*-***, **********(PO),Konthamuru(SO),

Rajanagaram Mandal, E. G. Dist, A.P-533102.

Contact: +91 – 949*******; Email: ********.*@*****.***

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OBJECTIVE: Seeking a challenging and rewarding opportunity with an organization of repute which recognizes and utilizes my true potential while nurturing my analytical and technical skills in the field of Digital Communication, Electronics, Networking, IT & Telecom

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PROFILE

• Sincere & diligent individual pursuing M. Tech (Electronics & Communication Engineering) from Godavari Institute of Engineering and Technology; accented with the latest trends and techniques of the field and having an inborn quantitative aptitude & determination to carve a successful career in the industry.

• Rich domain knowledge with comprehensive understanding of various languages & softwares like VHDL, Matlab, and C

• Self motivated and goal-oriented with a high degree of flexibility, creativity, resourcefulness, commitment and optimism

• Good communication skills, willing to learn and adapt to new opportunities and challenges.

Technical Skills

Language VHDL, Matlab, C

Operating System Windows 98/XP/2000/07

ECAD Tools Xilinx 9.2i simulator, FPGA, CPLD, Matlab7

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EDUCATIONAL CREDENTIALS

Pursuing M Tech (Digital Electronics &Communication Systems)

Godavari Institute of Engineering & Technology 72.11%

B Tech (Electronics & Communication Engineering); 2009

Aditya Engineering College 58.56%

Class XII (MPC); 2005

Narayana Junior College 71.9%

Class X (CBSE); 2003

Jawahar Navodaya Vidyalaya 63.58%

Project Presentation Automatic Rain Timer Working Model, SRUJANA-07

Vehicle Speed Detector Working Model, MEDHA-08

Conference speech compression using wavelets transformation with adaptive kalman filtering ICACP-2012

Project Handled

Title 3 to 8 Decoder using MATLAB and VERILOG (Mini Project)

Synopsis A simple 3 to 8 Decoder is implemented using Matlab and Verilog, which will be suited for

Application purpose.

Title Design of 8-Bit Microprocessor using VHDL/VLSI (Main Project)

Tools Individual parts of the Microprocessor to be executed such as MOV and ADD instructions, which

is implemented in VHDL. The ability to emulate a microprocessor on a programmable chip can lead to cheaper, more efficient and more flexible performance .

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Extra Curricular Activities

• Presided as the District Technical Cell CONVENER of Akhila Bharatheya Vidyardi Parishad (ABVP).

• Active member in NCC,Sports and Art competitions during my schooling.

Date of Birth: 18th June, 1987

Father’s Name: Chandra Rao

Gender: Male

Marital Status: Unmarried

Languages Known: English, Telugu and Hindi

Hobbies: Listening to Music, Playing Cricket

Nationality: Indian

Experience:Fresher



Contact this candidate