Senior Embedded Firmware Engineer with 5+ Years Experience

Prashanth N

Email: **********@*****.***

Phone: +1-816-***-****

LinkedIn: linkedin.com/in/prashanth-reddi-

Columbus, Ohio- 43202

Summary

Embedded Firmware Engineer with 5+ years of experience developing real-time software for multi-core SoCs and MCUs using C++11/14/17, Azure RTOS (ThreadX), Zephyr, and FreeRTOS. Strong background building low-latency, power-optimized firmware for consumer electronics and automotive systems interfacing ARM/Xtensa architectures. Experienced in multi-threaded RTOS design, ISR-driven architectures, device drivers, hardware bring-up, Device Tree configuration, OTA over the FOTA and cross-platform HAL development.

Skilled in low-power optimization, clock/power-domain control, and BSP integration for ARM-Cortex and Xtensa architectures. Hands-on experience working with GNSS, IMU, image/optical sensors, MIPI-based sensor workflows,BLDC/PMSM motor control systems and communication buses like I C, SPI, UART, and CAN. Demonstrated ability delivering production-grade embedded systems at Garmin and real-time automotive ECUs at KPIT using rigorous debugging, CI/CD, and hardware-in-loop validation.

Technical Skills

●Programming Languages: Java/Kotlin, java11, Python3, C, C++,C11/C14/C17,Bash scripting and Verilog/VHDL.

●RTOS & Middleware: Azure RTOS (ThreadX, NetX Duo, FileX, USBX), Zephyr, FreeRTOS, and POSIX.

●Protocols & Connectivity: BLE (GATT/GAP, L2CAP), Wi-Fi, TCP/IP, UDP, USB (MSC, HID), and MQTT for Azure IoT Hub.

●Hardware: STM32 (Cortex-M4/M7/H7), nRF91/52, ARM-Cortex, and Xtensa architectures.

●Methodologies: Hierarchical State Machines (HSM), SOLID principles, Google Test (gtest), and SAFe (Agile).

●Testing Platforms: MATLAB/Simulink, JTAG, Wireshark,tcpdump,Radare2 and Openwrt.

●Ethernet (802.3, 802.1AS/TSN), SOME/IP, DoIP, TCP/IP, UDP, and TLS/HTTP.

●LTE-M (Cat-M1), NB-IoT (Cat-NB1/NB2), 3GPP Rel-13/14, M2M, LwM2M, CoAP, MQTT, and AT Commands.

●Object-Oriented Design (OOD), RAII, SOLID principles, and multi-core SoC-FPGA hardware-software co-design.

●Adaptive AUTOSAR (Service-Oriented Architecture), Classic AUTOSAR (BSW/RTE), and POSIX-compliant system programming.

●CAN/CAN-FD (J1939), LIN, SPI, I2C, UART, and MIPI-CSI2,UDS (ISO 14229), OBD-II, and Over-the-Air (OTA) update solutions.

● HIL Automation & CI/CD: Python-based Test Automation with Unity, Continuous Integration (CI).

●Project Management:Agile development, Git, espressif, Cmake,Vector CANalyzer, DET Tools.

Professional Experience

Abymount/Garmin- Olathe,Kansas

Embedded Firmware Developer July 2023 – Present

Project Description: Developed and optimized a ZephyrRTOS firmware for Garmin’s next-generation wearable navigation and fitness devices. Focused on real-time task scheduling,multicore/threaded processing, and low-latency rendering with efficient hardware integration across Bluetooth, GNSS, and sensor interfaces

Responsibilities:

●Developed deterministic real-time firmware in C++14/17 for ARM Cortex-M series and Xtensa MCUs, specializing in high ticking period tasks for motion tracking and sensor fusion.

●Configured preemptive and tickless kernels in Zephyr and FreeRTOS, optimizing thread priorities and priority inheritance to eliminate jitter in mission-critical navigation loops.

●Architected complex Device Tree (DTS/YAML) structures and CMake builds to decouple hardware descriptions from C++ driver logic, ensuring seamless porting across nRF91, STM32, and ESP32 platforms.

●Engineered algorithms to analyze RTK correlation data, achieving centimeter-level positioning accuracy for wearable navigation.

●Reduced active power consumption by implementing efficient ISR designs and leveraging ULP coprocessors and RTC Fast Memory across five distinct sleep modes.

● Integrated the Nordic nRF9151 SiP for next-generation M2M applications, managing multi-mode LTE-M (Cat-M1) and NB-IoT (Cat-NB1/NB2) stacks within the nRF Connect SDK environment

●Optimized cellular power consumption by implementing 3GPP Release 14 power-saving features, including PSM (Power Saving Mode) and eDRX (extended Discontinuous Reception), to achieve microampere-level idle current in battery-constrained wearables

●Optimized Bluetooth Low Energy (BLE) stacks for high-throughput sensor data streaming, implementing custom GATT profiles and optimizing connection intervals for ultra-low power consumption.

●Optimized the BLE protocol stack using L2CAP Connection-Oriented Channels for bulk data transfers and managed GAP roles (Peripheral/Central) for seamless device discovery and pairing in multi-node environments like mesh networks.

●Developed secure MQTT clients to interface with nrf-Cloud services, enabling remote telemetry and device twin synchronization for shadow device metrics.

● A dedicated service for managing Over-the-Air (OTA) updates. It handles the orchestration of complex deployments, including multi-component updates (e.g., updating both a host MCU and a BLE module) and provides failure rollbacks to prevent "bricking" devices in the field.

●Implemented secure boot and over-the-air(OTA) update workflows using MCUboot with BLE & WIFI bands(FOTA), featuring multi-slot image management & scratch rollback scheming, rollback protection, and signature verification(chain of trust).

●Validated RF front-end performance for ISM bands (900MHz) and cellular frequencies, utilizing Arm TrustZone on the nRF9151 for secure key storage and identity management in cellular M2M ecosystems.

●Established Hardware-in-the-Loop (HIL) testing and unit testing (Ztest/Twister) within CI/CD pipelines (GitLab/Jenkins) for firmware stability.

Project outcomes:

●Modular Architecture & Rapid Porting Streamlined multi-platform development across nRF91x,

nRF51X,nRF91x, STM32, and ESP32 by designing a modular Zephyr Device Tree (DTS/YAML) structure. This decoupled hardware descriptions from C++ logic, reducing the time required for new board bring-up.

●Developed a high-precision navigation backhaul using NB-IoT, enabling the real-time delivery of RTK correction data (NTRIP) to achieve centimeter-level accuracy in a low-power, wide-area M2M network.

●Achieved great power saving by switching between PSM modes and DRX and eDRX modes, monitoring paging data from eNB and UE in LTE-E and NB-IOT bands.

●Ultra-Low Power Wearable Optimization Extended device battery life through the implementation of an efficient power management strategy using ULP (Ultra-Low Power) coprocessors and five distinct sleep modes. I optimized ISR design and peripheral scheduling to maintain high-frequency (1ms) sensor tasks while staying within strict power budgets.

●Developed a production-grade, secure FOTA (Firmware Over-the-Air) update system using MCUboot for STM32WB55 and STM32U5 platforms. The implementation featured multi-slot rollback protection and signature verification, ensuring 100% recovery from interrupted updates and protecting against unauthorized firmware execution.

Autosar BSW Cybersecurity engineer Aug,2018 –Sept, 2021

KPIT Technologies -Banglore,India

Project: Battery Management System ECU for Hybrid Vehicles. Worked on the development and validation of a Battery Management System ECU for hybrid vehicles, focusing on diagnostics, communication workflows, and real-time safety mechanisms. Designed and executed comprehensive integration test plans covering BMS state-machine behavior, CAN communication, cell balancing, voltage/temperature monitoring, and error-injection scenarios. Ensured full compliance with SAE, ISO 26262 Functional Safety, ISO 14229 (UDS diagnostics), and OEM-specific requirements by validating diagnostic services, safety functions, and fault-recovery paths through HIL simulations. Delivered detailed test results, traceability documentation, and engineering analysis to support regulatory approval and production readiness.

Responsibilities:

● Engineered high-fidelity Hardware-in-the-Loop (HIL) simulation environments using dSPACE and ETAS LABCAR to validate Battery Management Systems and powertrain ECUs.

●Spearheaded the design and deployment of Adaptive AUTOSAR applications, transitioning from traditional signal-based paradigms to Service-Oriented Architecture (SOA) using SOME/IP for high-bandwidth data exchange.

●Developed complex HIL signal injection models to simulate critical HV battery failure modes, including thermal runaway, voltage collapse, and sensor disconnections.

●Implemented full vehicle environment emulations (Rest-Bus) for CAN, LIN, and UDS, enabling comprehensive ECU testing without requiring a physical vehicle.

●Led the integration of AUTOSAR Basic Software (BSW) and Runtime Environment (RTE) using ETAS ISOLAR, configuring communication stacks, memory management (NvRAM), and diagnostic modules (DEM/DCM).

●OEM-level feature ownership by managing the end-to-end lifecycle of Battery Management System (BMS) firmware, from initial requirements gathering to final production-ready certification. Being a lead technical liaison to ensure 100% DBC and ARXML compliance across the vehicle network while maintaining rigorous traceability matrices within ALM tools to meet strict regulatory standards. Your leadership extended to owning the verification and validation (V&V) strategy for critical battery functions, successfully achieving ISO 26262 Functional Safety certification. Additionally, accelerated the hardware bring-up cycle and eliminated manual bottlenecks by architecting automated MATLAB/Simulink HIL frameworks and execution sequences, ensuring seamless integration for high-fidelity powertrain ECUs

●Designed ARXML software component descriptions and validated port interfaces to ensure seamless interaction between application layers and low-level drivers.

●Validated UDS (ISO 14229) services, including security access and DTC management, and optimized CAN communication pipelines for robust message encoding/decoding.

●Developed automated test suites using CAPL, Python, and Vector CANoe to stress-test network loads and verify bus-off recovery mechanisms.

Outcomes

●Successfully certified BMS firmware for functional safety by designing verification plans that covered critical cell balancing, SOC/SOH calculations, and thermal management logic under ISO 26262 standards.

●Hardened ECU resilience against processor faults and concurrency issues by implementing POSIX-based fault injection and custom C++11 watchdog monitors.

●Accelerated the hardware bring-up cycle by creating scalable MATLAB/Simulink HIL frameworks that allowed for parallel testing of software components before final hardware availability.

●Ensured 100% DBC compliance across the vehicle network by automating signal mapping and error detection scripts, preventing communication mismatches between cross-functional team modules.

●Eliminated manual regression bottlenecks by architecting a fully automated HIL execution sequence that captured results and generated requirements coverage reports directly into ALM tools.

●Achieved seamless OEM integration by maintaining rigorous traceability matrices and versioned test assets, ensuring all BSW + RTE configurations met strict MISRA and ISO standards.

Education

M.S. in Computer Science Engineering University of Central Missouri Jan2022-may 2023 Bachelors from Computer science from JNTUH University Sept,2014-may 2018

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