Software Development 10 Yrs
Resume:
Strong software development experience including requirements, design, coding, testing and integration.
Strong technical knowledge of: Different Hardware Platforms, SW Development, Portofolio/ Road Map, HW
IP/Platform Knowledge, Virtual Prototyping, Embedded Systems, ESL Tools & Methodology.
Exposure to product/ project life cycle, roadmap, portfolio from requirements to delivery.
Exceptional analysis and planning abilities essential in achieving overall organizational objectives
International (overseas), strong understanding of Virtual Prototyping Solutions, different hardware
platforms, embedded, tools and infrastructure.
Experience in IP and integration projects.
TECHNICAL PROFICIENCY
Opertaing System
Languages
Processors
Protocols/Standards
RTOS
Tools
Development
Technologies
Application
outlook)
UNIX, Windows
C, C++, SystemC, VC++, exposure to RTL languages
ARM processors (Arm9, Arm11, Cortex R4, Cortex M0, Cortex M3), 80C51,
DSPs (Trimedia, Real, EPICS etc.,), MIPS, ST20 tool set
Familiarity with AXI, AHB, VPB, DTL
standards, Multi-core architectures,
protocols I2C, SPI, UART, SWP etc.,
pSOS, pSOS+, OS20
Various debuggers (RVDS, gdb, ddd, EPICS), Multi-coare debugging, ESL tools
Coware, Cadence etc., SDK tools sets Open TV, configuration management tools like
clear case, Design sync, CVS
Firmware, various device drivers, Wrappers, Applications, Developing IP
and
Subsystem models, Sub-systems and Systems integration, product development &
deployment.
Virtual Prototyping, Simulation technologies, ESL domain,Settop Box – digital
decoder, GPS, Near Field
communication technology, LISA, Haste, Middle ware
technologies – OpenTV
Microsoft Project Proficient with Microsoft Office (Excel, Word, PowerPoint,
bus protocols based systems, DVB-SI, MPEG
multi-core debug frame works. Interface
CAREER CONTOUR
Since Nov’05
Central R&D, NXP Semiconductors, Bangalore – 560008
Oct’01 – Mar 05
Philips Software Centre, Bangalore – 560008
Oct’98 – Mar ‘01
Philips Software Centre, Bangalore – 560008
Sep’96 – Sep’98
Bharath Electronics Ltd., Bangalore - 560 013
Technical Manager
Sr. Technical Leader
Technical Leader
Deputy Engineer
PROJECTS EXECUTED
Project Name:
Duration
Company
Details
Virtual prototyping solutions for Identification domain
Jan 2009 – till dateOffsite)
Team Size: 10
Business Line, Identification, Bangalore
Developing IP portfolio in SystemC for Key business line Identification for NFC
and SMX technology domains and provide the integrated VPE solutions for
some of the key use cases SW development, architecture exploration, and
performance analysis
Technical Manager
Developer/technical lead/Architect skills, SystemC, ESL tools, Project
Management.
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Himalaya
Apr 2007 - May 2008 (Offsite)
Team Size: 20
Business Line, NXP Semiconductors, Bangalore
Developing huge IP portfolio with latest standards in ESL domain, which helps
all Business lines strategically to develop their products with high quality with
reduced time to market.
Technical Manager
Developer/technical lead/Architect skills, Customer support & Deployment,
Project Management
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Kaveri
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Jan 2006 - Apr 2007 (Offsite)
Team Size: 15
Business Line, NXP Semiconductors, Bangalore
The following objectives are managed in this project:
SystemC views of all IP are specified as per requirements in different
abstractions.
Identified subsystem configurations as per [FRS]
Integrated multi-core debug frame work with SystemC VPE.
Identified performance scripts as per [FRS ]
User documentation for Subsystem and individual IP’s.
Project Management: Requirement gathering to delivery, IP development,
technical reviews, guiding and mentoring the team.
Developer/technical lead/Architect skills, Customer support & Deployment,
Project Management
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Duration
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Sonata Modeling
Dec 2005 - Jul 2006 (Offsite)
Team Size: 12
Business Line, Philips Semiconductors, Bangalore
The following deliverables are managed with in the scope of this project:
Virtual prototype of ARM1156 subsystem (along with VPB peripherals)
Virtual prototype of EVP subsystem
Virtual prototype of RD16025C1 subsystem
Integration of the total system
Use cases SW development and Performance analysis
Technical Manager
Developer/technical lead/Architect skills, Customer support & Deployment,
Project Management
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TKM
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Ganga
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Bolivar
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Jan 2004 - Apr 2004 (Offsite)
Team Size: 5
Philips, Bangalore
The Co-simulation processor infrastructure is developed in System C with
various Co-processors. The objective is to do application partition/analysis
using this system for various configurations and also this system is used for
co-simulation for some of the RTL model being developed with the same
specs.
Project Leader/ Sr. Technical Leader: Developing and integrating some of the
Key modules
Project Management, C++, Simulation Kernel, Multi co-processor
architecture, co-simulation
Oct 2004 - Nov 2005 (Offsite)
Team Size: 15
Business Line, Philips Semiconductors, Bangalore
The deliverables of this project are:
Provide a Demo of the ‘startup kit’ at the WWTC conference end 2004,
Set priorities for the development of the model building block library of
PSE during the runtime of the project
Define and describe best practices in modeling, and offer these to the
CoReUse / MoReUse team,
Introduction of PSE.
The ARM11 SoC Subsystem Virtual Prototype project is part of the ARM11
SoC Subsystem product
Project Leader: Developing demo solutions, IPs, and show case with Business
lines and deployment in customer places
Project Management, C++, IP specs
Aug 2004 - Jun 2005 (Offsite)
Team Size: 8
Busines Line, Philips Semiconductors, Bangalore
The following deliverables are managed with in the scope of this project:
The Sea of EPICS tile, and to develop an integrated DSP Subsystem in in
System C language that consists of four Epics7B tiles including interfaces to
the AHB bus and configuration switch network. This project also includes
providing information to Multi-core debugging environment in component
level and System level.
Project Leader/ Sr. Technical Leader: Integrating and developing key
modules, Debuggers and Cores integration
Developer/technical lead/Architect skills, Customer support & Deployment,
Project Management, Target Compiler technology tools
Role
Skill Used
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Abstract
Jan 2004 - May 2004 (Offsite)
Team Size: 3
Philips, Bangalore
Objective: The primary objective of this project is to develop/evaluate the
Transaction level APIs for SystemC IP development. Key deliverables:
Evaluation report Project out come: In this project, we studied the existing
solution in the market and evaluated the short listed (Coware) solution. And
also carried out identified experiments to evaluate the solution with the close
support from the Vendor. The clear evaluation report is generated with
recommendations
Project Leader: Leading the project and writing Evaluation report
Project Management, Coware Tools in ESL domain, C++
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Digital set-top box on OpenTV platform
Nov 1999 - May 2001 (Onsite)
Team Size: 20
Philips, Holland
Digital Set-Top box is a gate way to the future home. It makes possible
interactive applications like advertising, t-commerce (television), EPG, third
party applications etc. OpenTV is the platform that is becoming the de-facto
standard for the Set-Top box environment. The goal of the project is to
produce a OpenTV enabled Set-Top box on Philips Hardware for Wizja (A
Polish Customer).
It is a Multisite (Eindhoven, Dublin, Bangalore and Hasselt) project. BATE
(Browsing for Access to Television Environment) is an OpenTV-based
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application that resides in an OpenTV-enabled Digital Set-top Box.
BATE allows television viewers to interact with the digital video broadcast so
that they can access various services from a digital television service
provider. Some of these services are EPG (electronic program guide), mail,
bouquets, Pay-TV, etc. In addition, it also allows users to configure their set-
top boxes to set their preferred audio languages, region based graphics,
themes, favorite programs, installation parameters, tagging the events, etc.
The project was divided into sub-projects. I was involved in the sub-project
where the device drivers were adapted and integrated with the OpenTV
middleware
Language/Tools : C, OpenTV middleware, Clearcase, ClearQuest, MSDEV,
Dejagnu Test Scripts, MPEG,DVB PSI/SI analyser
RTOS: pSOS+
Target System : Philips MIPS processor board
Technical Leader: Involved in analysis, design, development and testing the
modules de-multiplexer Teletext and descrambler. Associated with all phases
of product development. Taken lead in integration.
C, OpenTV middleware, Clearcase, ClearQuest, MSDEV, Dejagnu Test Scripts,
MPEG, DVB PSI/SI analyser, pSoS+
Role
Skill Used
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Adaptation Layer Set-top box Project
Oct 1998 - Oct 1999 (Onsite)
Team Size: 15
Philips, Belgium
The project is involved implementation of drivers (audio, video, demodulator,
demultiplexer, modem, front panel, etc.) according to OpenTV HPK
specification (also taking into account the customer-specific needs). The
product development has undergone through all phases of SDLC. The drivers
are implemented using generic API (an internal development by Philips called
FlexTV layer), to make the adaptation layer portable to a different hardware
and/or OS. The drivers along with the OpenTV runtime make a set-top box
OpenTV enabled. A standard and generic interface (FlexTV) for the Philips
device drivers was formulated. This interface is used in adapting the OpenTV
middleware. Finally the project involved in the integration with OpenTV
runtime.
Language/Tools: C, OpenTV middleware, Clearcase, ClearQuest, ST20
Embedded Toolset, MPEG, DVB PSI/SI analyser.
RTOS: OS20.
Target System: Thomson processor board.
Senior Engineer: Responsible for the Analysis, Design, and Development of
demux, OSD and front panel driver. Involved in definition of FlexTV API
(generic interface) layer, which gives abstraction to the underlying hardware
integration.
C, OpenTV middleware, Clearcase, ClearQuest, ST20 Embedded Toolset,
MPEG, DVB PSI/SI analyser.OS20
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Flycatcher Upgrade Software.
Jun 1998 - Sep 1998 (Offsite)
Team Size: 4
INDIAN ARMY, Bangalore
Flycatcher S/W is Radar Software. Flycatcher Upgrade Software shall carry
out the modifications to the Tracking subsystem software, Display subsystem
software and preparing the Display Data Input Unit Interface (DDIU I/F). In
Tracking Subsysterm the search has to be carried out X-band and the target
acquisition and tracking has to be done entirely in the Ka band. The Display
Data Input Unit Interface is the interface between the numeric key pad,
Alpha numeric display and to the Flycatcher S/W. It should display the list of
pages on the Alpha Numeric Display.
Host System: VAX11/785, PC AT Pentium.
Target System: SMR-MU Computer and M68k board with pSOS kernel.
Deputy Engineer: Designing and coding DDIU, study and implementing
Tracking algorithms.
As enunciated in MIL-STD 498 with support from TEAMWORK CASE tool. SMR-
MU assembly, C, pSOS+.VAX11/785, PC AT Pentium.
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Hand Held Global Positioning System
Jan 1998 - Jun 1998 (Offsite)
Team Size: 3
Indian Army, Bangalore
The Global Positioning System is used to identify the current location, to store
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different location information and also to navigate to a particular location with
good graphical information. The Global Positioning System receives the data
from satellites and process the information to display in different formats. It
contains the group of display pages, each page have different fields which are
editable. The pages contain graphics and test information regarding the
waypoints, routes, waypoint lists. It is an embedded application which runs
on Intel (80188 processor) board.
Deputy Engineer: Designing and coding full application including keyboard
and display device drivers and configuring the Csi monitor.
C, ic86 tool set, 80C186 board's Softscope debugger
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Porting of MFK S/W on pSOS+ platform
Sep 1996 - Jan 1997 (Offsite)
Team Size: 4
BEL, Bangalore
Entire MFK S/W is ported from pSOS to pSOS+ platform. All pSOS calls are
replaced by pSOS+ system calls. MFK S/W is ported onto the M68K board.
Deputy Engineer: Building BSP for M68000 board, ISR assembly routine
C, pSOS
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Development of MFK software for LCA (Light Combat Aircraft):
Feb 1997 - Dec 1997 (Offsite)
Team Size: 10
INDIAN AIRFORCE, Bangalore
The MFK is a part of the avionics system of LCA. It provides a man-machine
interface for the pilot/crew to view and modify the flight related parameters
and have dialogue with the avionics subsystem. MFK is an integrated control
and display unit comprising of an alphanumeric keyboard, and an LCD matrix
display screen. The keys are for controlling and editing the displayed data
and power on/off of certain avionics equipments. MFK also supplies time
information to MFR for display. MFK is mounted in the cockpit facilitating pilot/
crew operation. MFK operates as a slaved RT to the Mission Computer (MC)
on a MIL-STD 1553B bus. The CSCI processes the data incoming over the
1553B interface bus and displays it in predefined formats after performing
necessary validations and conversions. This CSCI pertains to the embedded
software of MFK. This software carries out the entire MFK operations of page
display and editing, communication with interfaced systems, equipments
handling and self-tests. It consists of appropriate device handlers, display
algorithms, communication handlers, data validation modules
Deputy Engineer: Developing the Display algorithms, Data validation modules
and writing the Device Driver functions necessary to initialize and maintain
dual channel serial communication controller 85c30 and involved in
developing the MIL- STD 1553B bus
As enunciated in MIL-STD 498 with support from TEAMWORK CASE tool.
C, pSOS
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ACADEMIC
1996
PROFESSIONAL TRAINING
Project Management and SystemC
Structured analysis and design methods in Real time Systems, RTOS
CONFERENCES
PMP Conferences
ESL Conferences
PERSONAL DETAILS
Date of Birth
Address
B.Tech (CS&E)
National Institue of Technology (NIT), Warangal
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10-04-1974
#35, Esteem Gardenia, Flat No: 101, Aster Block, Sahakara Nagar, Bangalore
PIN Code - 560092. Contact No.:+919*********
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