Laurent B. Matala-tala
Riverside, CA 92505
*************@*****.***
Background Summary/Objective
Obtain a position in Process/Development Engineering to utilize and grow my technical skills and provide me with opportunities for advancement and personal development.
Experienced and detail knowledge of various semiconductors manufacturing processes (Si, GaN, SIC, AlN, LiNbO3) i.e. photolithography, thin film depositions (PVD and CVD), wet and dry plasma etches. Experience in Statistical methods of data analysis (SPC).
Education
B.S. Electrical Engineering, Portland State University, Portland OR (June 2008)
Technical Skills
Lean Manufacturing
SPC (Statistical Process Control)
Develop, Sustain and Optimize semiconductor processes
Root cause analysis
ESD Protection certified
SolidWorks
Python
Proficient in using tools such as photolithography systems, PECVD, and plasma etchers, ADT Dicing saws and WEST BOND wire bonder
WORK
EXPERIENCE:
Microelectronics Engineer August 2014 – Present
The Aerospace Corporation, El Segundo, CA
Performing a variety of duties to support the research and development of new microelectronic, opto-electronic, micro-electromechanical sensors and devices in a cleanroom environment.
Performing sample inspection with optical microscopes to identify any defects.
Performing photolithography, dry and wet etching, metal and PECVD thin film deposition, wafers dicing, wire-bonder, and samples polishing.
Process Engineer May 2010 – July 2014
Transphorm, Goleta, CA
Worked in CTO (Chief Technology Officer), Research and Development, group with team of scientists and engineers to develop fabrication processes for the next generation of advanced GaN-based electronic devices (GaN Hemt and Diode).
Developed, Sustained and optimized process.
Supported manufacturing for integration of new process.
I’m certified in chemical wet etch (Al2O3 etch, Ti etch, Au etch, Si3N4 etch, etc.) and Dry etch (Plasma Therm, LAM 9600, LAM 9400 and LAM Rainbow 4520); metal and dielectric deposition (e-Beam CHA, Sputter PERKIN 400, PECVD Novellus and ALD Oxford flexAl); Metal LIFT-OFF; Photolithography (Coat, Exposure, Develop, Overlay and Defect Inspections); Visual Defect Inspection using microscope; Metrology (AFM, Ellipsometer, Nanospec, Veeco Dektak Profiler) and Auto Probe (PCM, Switching and DC testing).
Conduct periodically qualification on tools, making sure that all measurements stay within the tool’s specs.
Semiconductor Technician II Feb 2009 – Apr 2010
Honeywell Aerospace, Redmond, WA
First, I worked as a contractor for Manpower and became a permanent full-time employee for Honeywell, worked in a clean room environment under the MEMS division. Perform various silicon and glass wafer processing steps as assigned; include working with hazardous chemicals, operating and maintaining complex automated equipment used in production of silicon wafers. I’m certified in chemical wet etch (Au etch, Cu etch, Ti etch, SiO2 etch, etc.) and cleaning (RCA clean, PIRANHA); EDP; metal LIFT-OFF; PROBE (Wafer test); EVG 520 and EVG 620 (Wafers Bonding).
I monitored and inspected product run operations to determine control and output quality of etch procedures, and where applicable, isolate any spec violation issues and tolerance margins.
Production Specialist May 2007 – Jan 2009
Microchip Technology, Gresham, OR
As a production specialist, I drove quality-controlled production in etch department (200mm wafer fabrication facility). I have operated complex equipment and tooling for wafer fabrication and certified in the functional use of the following tools: LAM Alliance 9400PTX Etcher; LAM Alliance 9600 (Metal Etch) PTX Etcher: TEL DRM and PE Plasma Etcher; Fusion Gemini UV Bake; Semitool SST; RUDOLPH and Hitachi CD SEM.
I monitored and inspected product run operations to determine control and output quality of etch procedures, and where applicable, isolate any spec violation issues and tolerance margins.
Machine (Reactor) Operator March 2006 – May 2007
SEH-A Company, Vancouver, WA
Worked for Volt services as a machine (reactor) operator at SEH-A in a clean room environment under the Epitaxial department.
Operated reactors (AMT and SMT) used in the production of silicon wafers.
Checked and inspected operation against predetermined tolerances and specifications
Drove quality improvement metrics up by 10% from baseline.