Eric Lynum *** MacArthur Ave., Vienna, VA *****
******@*****.*** Cell 703-***-****
Career Summary
Electrical Engineer with superb interpersonal, analytical, and creative problem-solving skills. Quick learner with excellent written and verbal communication skills, able to work efficiently and productively in a change-oriented environment to produce premier results.
Computer Skills
ALDEC Active HDL, Altium Designer, Cadence, Mentor Graphics DxDesigner Schematic Tool, Verilog, VHDL, ORCAD, Xilinx Design Tools, ModelSim, Excel, Microsoft Word, Adobe Acrobat, PowerPoint, Visio, Oscilloscope, HP Logic Analyzer, Audio Analyzer
Career Experience
Meta-OFX, Arlington, VA 2021-Present
Digital Design Engineer
• Developed schematics for a Q7 Interface Card using Altium Designer.
• Successful development of 1PPS PLL design for Q7 Zynq FPGA.
• Successful development and testing of AES core design for Q7 Zynq FPGA.
• Development and implementation of Debug Core for Q7 Zynq FPGA.
Mathtech ICSG, Falls Church, VA 2014-2021
Hardware Engineer
• Supported production test of military intercom device.
• Led ICS capture and proposal management activities.
• Prepared ICS presentation packages as well as schedule management and matrixing resources.
• Developed outlines, compliance matrix, and produced proposal documents for submission
• Assisted and trained technician and engineers on ICS Hardware Acceptance Test Procedure.
• Successful testing of new DDC 1553 transceiver and CODEC on Crew Audio Card.
• Successful testing of ARINC 429 Holt development card using and modifying a SPI core on a separate
FPGA development system.
• Using Altium Designer created schematics and PCB layout and performed testing of a Front Panel Tester box for Front Panels of military intercom device.
ASRC, Seabrook, MD 2005-2014
Hardware Engineer, NASA Goddard Contract
• Supported GOES-R as Spacecraft Command and Data Handling Integration and Test Lead.
• Reviewed and edited technical documents
• Designed, developed and implemented an Embedded Development system for a Multi-Wavelength Dielectrometer system containing a Xilinx PowerPC Processor subsystem.
• Wrote an article published in Xilinx’s “Embedded” Magazine on designing real world embedded PowerPC applications.
• Performed Signal Integrity Analysis for several cards for the Glory Program using Hyperlynx SI Tool.
• Performed Signal Integrity Analysis for several cards for the GPM program using Hyperlynx SI Tool.
Eric Lynum page 2
Eastern Research, Moorestown, NJ 2004-2005
Hardware Engineer
• Designed and developed a 28 port T1/E1 Front Card and Rear Card for the optical switch system.
• Developed and delivered a project plan presentation on the T1/E1 Front Card set.
• Created and integrated FPGA and CPLD code in VHDL on T1/E1 Front and Rear Card set.
Ericsson, Rockville, MD 2000-2004
Hardware Engineer
• Worked on a team of 5 engineers in all phases of development and design for a Gigabit Ethernet Card.
• Modified and designed a Gigabit Ethernet Card on an Edge Router System.
• Guided integration of Broadband Communication system with thermal, functional and EMI testing.
• Verified and integrated FPGA code on OC3-POS HULA for Edge Router System.
• Performed Signal Integrity Analysis for Gigabit Ethernet Card using Hyperlynx SI Tool.
• Modified OC12-POS FPGA loader Verilog code for Gigabit Ethernet Card.
Tellabs, Ashburn, VA 1999-2000
Hardware Engineer
• Joined a team of 6 engineers as a card level designer to implement communications hardware.
• Modified and designed a daughter card on an Echo Canceller Module for a Narrowband. Communications system.
• Assisted in integration of Broadband Communication system with thermal testing of Optical Daughter Card modules.
Innovative Concepts, McLean, VA 1998-1999 Hardware Engineer
• Assisted a team of 8 engineers as a board designer for a satellite system for the Naval Research laboratory.
• Devised a card level test fixture for IOBP Controller/Input Output module.
• Developed VHDL code for APAC509 ALTERA FPGA Card.
Lockheed Martin, Manassas, VA 1996-1998
Associate Electrical Engineer
• Established a role on an engineering team of 4 as a verification tester.
• Tested the PHASOR ASIC using the TEXSIM cycle simulator for a satellite design.
• Generated functionality tests for the SUMMIT and ASCENT interfaces of the AMBI- 2 ASIC for a satellite design.
Sprint, Altamonte Springs, FL 1993-1996
Engineer
• Assisted as a circuit designer in a group of 20 using Sprint’s proprietary circuit design system.
• Provided telephone support to customers and field engineers on circuit design solutions.
Education
Kansas State University, Manhattan, KS
Bachelor of Science, Graduation Date 1992, Electrical Engineering