Software Development Product
Resume:
Sean SungYong Hong
Aliso Viejo, CA
**************@*****.***
U.S. Permanent Resident
CAREER SUMMARY
• Seasoned engineer with 22 years of extensive experience spanning product development, chipset testing, and wafer-level expertise, managing the full software development lifecycle.
• Highly respected for strategic verification planning, cross-functional collaboration, and innovation in test efficiency.
• Skilled in competitive analysis, implementing solutions for enhanced test accuracy, and significant reductions in test time.
KEY SKILLS
• Expert in wafer test planning and setup for mixed-signal products using Automatic Test Equipment
(ATE) such as Advantest's T6371 and Yokogawa's ST6730.
• Proficient in communication protocols (I2C, SPI, UART) and troubleshooting techniques.
• Analytical expertise in probe card circuit boards, system components, and test requirement definition.
• Experienced in low-frequency test solutions, test program development, and debugging.
• Familiarity with reliability testing, lifecycle qualification, and yield improvement methodologies based on yield analysis, bin yield limits, fab PCM data, and other metrics.
• High proficiency with test instrumentation including Digital Multimeters, Oscilloscopes, Power Supplies, Calipers, and microscopes.
• Skilled in generating and reviewing technical documentation (schematics, test procedures, block diagrams, specifications).
PROFESSIONAL EXPERIENCE
Feb 2023 – Present
IDS (Interactive Display Solutions Inc.),
Irvine, CA
Engineer
• Analyzed RMA defects for medical and aviation products, prepared detailed reports, and recommended corrective actions.
• Managed new product workflows using Fishbowl, overseeing BOM creation, manufacturing orders, shipments, and inventory.
• Implemented MES for product schedule tracking and process monitoring aligned with production and sales.
Feb 2020 – April 2022 G2Touch, Seongnam, Republic of Korea Test Team Manager
• Collaborated across design, sales, production, and quality teams to enhance productivity and customer satisfaction.
• Developed optimized ATE test programs for touch sensor controller ICs with EEPROM, reducing test time.
• Mentored and coordinated work schedules for new engineers.
• Derive correlation with bench - ATE for analysis on key parameters.
• Defining low yield limit and manufacturing specs for wafer sort and final test.(ex COF Package)
Oct 2013 – Jan 2020
G2G Solution,
Suwon, Republic of Korea
Principal Test Engineer
• Improved mass production efficiency through test program optimization.
• Verified analog DC characteristics, ensuring compliance with performance standards.
• Conducted reliability tests and analyzed production test results.
• Improve yield based on yield analysis, bin yield limits, fab PCM data, and other metrics
• Ensure new devices meet test yield, test coverage, quality, and cost objectives
April 2003 – Oct 2013
Clover Hitech,
Seoul, Republic of Korea
Senior Test Engineer
• Managed testing for Display Driver ICs (DDIs) and fingerprint recognition ICs
• Developed multi-DUT test methods to enhance wafer test efficiency.
• Led projects for high-speed interface development (AIPI++) for AMOLED display drive ICs.
• Designed test programs for fingerprint recognition ICs and managed wafer and package test programs.
• Improve yield based on yield analysis, bin yield limits, fab PCM data, and other metrics
June 2000 – June 2003
Signetics Korea,
Paju, Republic of Korea
Entry Test Engineer
• Conducted testing for SoC products, generating detailed evaluation reports.
• Utilized x-ray imaging, curve tracing, and decapsulation for defect analysis in wire-bonded packages.
(Package types are DIP, QFN, QFP, SOP, and BGA)
EDUCATION
Bachelor of Electronic Engineering,
Kookmin University,
Seoul, Republic of Korea, 2000
PATENTS
• “A Capacitive Touch Panel Touch Detection System and Method for Detecting a Change in Charging/Discharging Time Constant,” Oct 2015
• “Active Low-Power AFE System of Single-Layer Touch Panels,” Oct 2015
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