Software Engineering

RAMANANDA SAI REDDI

+1-413-***-**** www.linkedin.com/in/ramsai-reddi-83a450152 **************@*****.*** Graduate student in Electronics and Computer Engineering actively seeking opportunities in software development, systems engineering, hardware design and testing. I bring hands-on experience in operating systems, network administration, computer hardware design, and software engineering. I have proven expertise in Hadoop cluster management, data security, and system automation. Known for my critical thinking, strong problem-solving abilities, and a practical, detail-oriented approach to tackling engineering challenges.

EDUCATION

University of Massachusetts Amherst Massachusetts, USA Masters of Science in Electronics and Computer Engineering September 2023- May 2025 Vellore Institute of Technology Vellore, India

Bachelors of Technology in Electronics and Communication Engineering September 2017 – June 2021 RELEVENT COURSES

Operating Systems, Computer Networks, Low Power Embedded systems, Testing & Diagnosis VLSI Systems, VLSI Design, Computer Architecture, Synthesis and Verification of Digital Systems, Wireless Networks, Microcontrollers, Data structures and algorithms, Signal Processing, Control Systems, Machine Learning for Engineers, Applied Linear Algebra. SKILLS

Java, Python, C++, MATLAB, Object Oriented Programming, Circuit Design and Analysis, Unix, Linux Shell Scripting, Ansible, Keil u Vision, Multisim, Proteus, Virtuoso Cadence, HSPICE, Data Structures and Algorithms, DBMS, SQL, Machine Learning, Verilog, Design for Test (DFT), BIST, firmware.

PROFESSIONAL EXPERIENCE

Infosys Technologies Private Limited - Client: Citi Bank Hyderabad, India Systems Engineer (Hadoop Admin) Sept 2021 – July 2023

• Served as Hadoop Administrator for managing and maintaining over 45+ Hadoop clusters with more than 5000+ servers across NAM, MEXICO, EMEA, and APAC regions regions for Citi Bank. Utilized ServiceNow ticketing tool to address issues across the clusters.

• Configured and maintained IBM Sterling Connect: Direct (NDM) jobs to automate secure, high-throughput file transfers between mainframe and distributed systems.

• Managed Hadoop Distributed File System (HDFS), YARN, and MapReduce jobs, ensuring high availability and performance.

• Performed cluster upgrades, patching, and routine maintenance while minimizing downtime, aligning with Citi’s enterprise IT policies.

LEADERSHIP EXPERIENCE

Indian Student Association (University of Massachusetts Amherst) Treasurer September 2024 – May 2025

Managed budgeting, expense tracking, and fundraising initiatives. Collaborated with team members, vendors, and university stakeholders, demonstrating excellent written and verbal communication skills and leadership under pressure. PROJECTS

RISC V simulator in C++

• Developed a 5-stage pipelined RISC-V simulator in C++ to analyze instruction execution at the architectural level, that can detect and resolve hazards.

Multithreaded webserver

• Engineered an HTTP server in C++ capable of handling multiple client requests concurrently through multithreading techniques. Further evaluated the server to compare its performance with existing Apache and Nginx servers. PPSFP Fault Simulation and Built-In Self-Test (BIST) Design

• Implemented a PPSFP fault simulator to evaluate fault coverage in ISCAS benchmark circuits (c17, c432, c499, c880, c1355) using random input patterns, achieving an average fault coverage of 95%.

• Designed and simulated a BIST circuit featuring a 32-bit LFSR-based TPG and a 16-bit MISR for Output Response Analysis, achieving an average fault coverage of 95% and an aliasing probability of 0.0015%. Virtual Memory Manager

• Built a basic virtual memory manager for an operating system, incorporating page tables, physical memory, disk blocks, and the clock algorithm for page replacement.

Thread library in Linux

• Constructed a custom thread library in Linux using C++ to manage multiple threads within a single process. Designed a disk scheduler in C++ to handle I/O requests and task scheduling efficiently. RFID and Keypad interfaced dual security system using 8051 and Keil u vision

• Assembled a dual security lock system using 8051 microcontrollers and assembly language. Executed the project utilizing Keil uVision and Prog ISP for hardware interfacing. VLSI Custom Design: Cadance: Schematic XL,Layout GXL, Assura. Synopsys:HSPICE, Cscope.

• Implemeted transistor-level schematics and created layout for simple circuits like multiplexer, 4-bit accumulator. Conducted Design Rule Check (DRC) and Layout versus Schematic (LVS) verification. Performed delay and power analysis using HSPICE.

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