R&D Senior Specialist

CURRICULUM VITAE

Wei Wei, Ph.D.

San Jose, CA, USA

E-mail: ********@*******.***

SUMMARY

·US permanent resident fully authorized to work in the US Citizen

·PhD in Electronic Engineering from The University of Tokyo in Japan and Xi’an Jiaotong University

·16 years hardware and chips experience including the development of video and image processing/monitoring chips, Closed loop trajectory correction system chips based on real time graph and image feedback, Video codec development based on H.264/H.265 using C/C++, Matlab, and Java, Python.

·16 years software, image and video processing and control experience, including image/video capture, graphics detection, data compression, multi-frame image processing, Jitter and flicker processing, Low gray level image enhancement, Graphic edge detection, Brightness enhancement technology, network transmission experience, using programming language such as MATLAB, C, and Java, Python, MySQL.

·16 years ASIC, FPGA design experience Knowledgeable on High Level Design (C, C++, SystemC and SystemVerilog), RTL Coding (VHDL, Verilog HDL), System, Timing analysis, and Logic Verification, Physical Design (Floor planning, Place and Route, Layout, Clock Insertion), good at Altera QuartusII, Xilinx ISE / Vivado, Synopsys, ModelSim, Aldec Active-HDL, synthesis, APR, STA, LVS, Synopsys ICC, DFT tools, scripting in Python.

·6 years experience of communication technological research experience including research on standardization of the communication systems consists of 3G, 4G LTE, LTE-Advanced, as well as key technology research and simulation on PHY, MAC, MIMO, such as OFDM, Carrier Aggregation, Uplink Power Control (ULPC), Inter-Cell Interference Coordination (ICIC), and QoS, using Matlab/C++ and OPNET.

·More than 10 years experience of PCB design including schematic capture, PCB layout and multilayer high density interconnect printed circuits using DDR, SDRAM, FPRA, ARM, FPGA, ASIC, and image processing chips; proficient with PCB design software such as Cadence, AutoCAD, Cadence Allegro, Altium Designer (AD), and Mentor.

·9 years experience of intellectual property management including drafting patent, patent application, data mining, monitoring and early warning of patent infringement.

·Held 166 china invention patents, 17 united states patents, and 48 Patent Cooperation Treaty (PCT) patents; obtained a total amount of US $10,000,000 in aid, a total amount of US $5,000,000 in shipments, and generate economic benefits of US $100,000,000.

·Prizes and Awards : Information Industry Whose Significant Technological Invention Award, Top 100 Innovative Talent, high-level entrepreneurial talent, Xi'an Science and Technology Award, High-Tech Enterprise Entrepreneur Award

·Chinese Institute of electronics senior member

·Post-Doctoral supervisor

WORK EXPERIENCE and RESEARCH INTERESTS

Oct 2017 ~ Present Research institutes :

HYC,(USA),Inc

Status :

R&D Senior Specialist

Research Projects :

Non-contact Electroluminescence (EL) Detection Technology for MicroLED, including physical model establishment and verification, power supply design, image automatic acquisition system, image acceleration and processing system design and development.

Development of DisplayPort IP Core based on Xilinx / Intel

DisplayPort IP Core : PHY layer, Training, Video Pack, Main-link, framing, Aux

Video/Graphics process include the software of Algorithm design (such as convolution, low gray level enhancement, edge detection, etc.), graphics / image alignment, error detection, etc. using C/C++, and the hardware design based on FPGA, DDR and DSP using Xilinx Vivado, Altera QuartusII, ModelSim, VHDL/Verilog HDL

Leading team develop the VESA DP (DisplayPort)/eDP (Embedded DisplayPort) Standard interface and IP Core using Xilinx Vivado, Altera QuartusII, ModelSim, VHDL/Verilog HDL, and C

Leading team develop the MIPI interface and IP Core using Xilinx Vivado, Altera QuartusII, ModelSim, VHDL/Verilog HDL, and C

Leading team to Development of video/image processing IP Core and chips for LCD/OLED panel and device include Algorithm design, Hardware flow optimization and implementation using Xilinx Vivado, Altera QuartusII, ModelSim, VHDL/Verilog HDL, and Matlab/C

Development of video transmission, recognition and monitoring system based on H.264/265 include Hardware device, PC client, mobile client

(Android), using C/C++/Java/Python

Development of video/image pattern generator suitable for a variety of types and sizes of LCD/OLED module, Capable to measure Chroma, brightness, flicker and also low brightness measurement

Development of LCD/OLED module electrical test fixture, semi-contact under the premise of integrity assurance testing, greatly avoid contact damage occurred during the test.Flashing LCD module to adjust the degree of automation equipment, to reduce the adverse Flicker caused by human factors, improve product consistency test.

Achievement :

China Patents : 53

Licensed Chinese invention patents : 36

US Patent : 1

Product : 3

Jan 2010 ~ Mar 2017 Research institutes :

(1) Xi’an HuiWei Information Technology Co., Ltd.

(2) Xi’an GoShine Information Technology Co., Ltd. Status :

(1) Vice general manager

(2) Technical Director

(3) Shareholder

(4) Senior Software Engineer, Senior Hardware Engineer Research Projects :

Video codec development based on H.264/H.265 using C/C++, Matlab, and Java

image and video processing and control experience, including image/video capture, graphics detection, data compression, multi-frame image processing, Jitter and flicker processing, Low gray level image enhancement, Graphic edge detection, Brightness enhancement technology, network transmission experience, using programming language such as MATLAB, C/C++, and Java.

the development of the COLORO product based on LED

the development of the LED synchronous / asynchronous video card

(wired / wireless)

the development of the LED broadcast control software

the development of the LCD asynchronous video card (wired / wireless)

the development of Closed loop trajectory correction system chips based on real time graph and image feedback

the development of video and image monitoring chips based on video capture, graphics detection and data compression, multi-frame image processing

Lead team of over 80 members to plans for Research and development projects, including: R & D background, objectives, goals, schedules, milestones, quality control, acceptance, etc.

Developed and commercialized video card products that have netted over

$1 million in revenues since 2012

Lead the development of products have passed the certification of ISO9001 quality system.

The ASIC, FPGA design of image, video processing chips, including Algorithm Designing (Matlab, C/C++), Architecture Design (SystemC, SystemVerilog), RTL Design (VHDL, Verilog HDL), System, Timing and Logic Verification (ModelSim, SystemVerilog, FPGA, Cadence NCSim, Synopsys VCS), Physical Design (Floor planning, Place and Route, Layout, Clock Insertion, Cadence, Synopsys ICC)

The Hardware system development of the synchronous / asynchronous video card (wired / wireless) product based on FPGA and ARM, DDR, SDRAM, including FPGA prototype design, ARM control architecture design, driver porting and configuration, such as PDP, LED,LCD panels

Schematic design, PCB Layout and routing based on Cadence OrCAD/Allegro

Achievement :

China Patents : 16

Software copyright : 2

Product : 3

ISO9001

Jan 2012 ~ Present Research institutes :

(1) Shaanxi Provincial Institute of Information Engineering Status :

(1) Professor

(2) Vice President

(3) Director of the Intellectual Property Center

Research Projects :

(1) E-government top-level design and intellectual property

(2) Cloud computing security and platform design

(3) "Smart City" Standardization - Broadband Shaanxi, intelligent transportation, smart logistics, smart urban management Achievement :

China Patents : 54

China Standard : 4

Jan 2009 ~ Present Research institutes :

(1) Xi'an University of Posts and Telecommunications

(2) the Institute of the internet of things and integration of industrialization and informatization

Status :

(1) Professor

(2) Vice President

(3) Innovative Talents, In Shaanxi Province "hundred people plan" Research Projects :

image and video processing and control experience, including image/video capture, graphics detection, data compression, multi-frame image processing, Jitter and flicker processing, Low gray level image enhancement, Graphic edge detection, Brightness enhancement technology, network transmission experience, using programming language such as MATLAB, C, and Java.

Video codec development based on H.264/H.265 using C/C++, Matlab, and Java

E-government top-level design and intellectual property

Cloud computing security and platform design

"Smart City" Standardization - Broadband Shaanxi, intelligent transportation, smart logistics, smart urban management

The ASIC, FPGA design of image, video processing chips, including Algorithm Designing (Matlab, C/C++), Architecture Design (SystemC, SystemVerilog), RTL Design (VHDL, Verilog HDL), System, Timing and Logic Verification (ModelSim, SystemVerilog, FPGA, Cadence NCSim, Synopsys VCS), Physical Design (Floor planning, Place and Route, Layout, Clock Insertion, Cadence, Synopsys ICC)

The Hardware system development of the synchronous / asynchronous video card (wired / wireless) product based on FPGA and ARM, including FPGA prototype design, ARM control architecture design, driver porting and configuration

Lead the product development project has received a $5 million funding

Lead team of over 15 members to plans for Research and development projects, including: R & D background, objectives, goals, schedules, milestones, quality control, acceptance, etc.

Schematic design, PCB Layout and routing based on Cadence OrCAD/Allegro

The video image processing based on MATLAB, C, Java Achievement :

China Patents : 54

China Standard : 4

Feb 2007 ~ Aug 2012 Research institutes :

ZTE Corporation, Handset Product Division, Standard Pre-research Department

Status :

(4) Chief Information Officer (CIO)

(5) The manager of the university cooperative projects

(6) System engineer, The research of the future communication standard and specification

Research Projects :

Communication technological research experience including research on standardization of the communication systems consists of 3G, 4G LTE, LTE-Advanced

The key technology research and simulation on PHY, MAC, MIMO, such as OFDM, Carrier Aggregation, Uplink Power Control (ULPC), Inter- Cell Interference Coordination (ICIC), and QoS, using Matlab, C++ and OPNET.

Intellectual property output for 3G and 4G communication standards, such as system and terminal product

Research and innovation of new product and new technology

As CIO, I have obtained a total of $10000000 in aid, shipments reached US$5,000,000, generate economic benefits of US$100,000,000 through the intellectual property

ASIC design flow including emulation, prototyping, DFT, RTL coding including emulation, prototyping, DFT, RTL coding including Timing optimization experience, TCL coding, high-speed digital circuits, VLSI circuit design, video control, display technique, data storage and control

(such as DDR, SDRAM) etc, using FPGA, ARM

The design and research of key technologies of Physical Layer (PHY)

The design and research of key technologies of MAC

The design and research of key technologies of Cross-Layer

The Technology group of carrier aggregation and Uplink Power Control

(ULPC) and Inter-Cell Interference Coordination (ICIC) for the 3GPP, LTE, LTE-Advanced

The relay system project of IMT-Advanced - Self-organized virtual base station (BS)

The research of key technologies of Uplink MIMO

The research of Schedule and QoS of relay

The research of key technologies of MU-MIMO and Coordination MIMO

The research of key technologies of relay for the IEEE 802.16j Achievement :

Patent Cooperation Treaty (PCT) : 47

US Patent : 17

Chinese Patent : 166

Contribution : 6 (for 3GPP ), 1 (for IMT-ADVANCED ), 1 (for IEEE 802.16j) July 2005 ~ Feb 2007 Research institutes :

(1) The University of Tokyo Institute of Industrial Science Advanced Display Research Center

(2) Fujitsu Laboratories Ltd., Shinoda Fellow Group Senior Researcher Status :

(1) Postdoctoral Fellow in the university of Tokyo

(2) The principal researcher of logic circuit design and image processing technology of the next generation of ultra large screen display Plasma Tube Array (PTA) and Plasma Display Panel(PDP)

Research projects :

(1) Japan Advanced PDP Development Center Corporation (APDC), Basic PDP research and human resource development at university research departments

(2) Fujitsu Laboratories Ltd. Shinoda Fellow Group Senior Researcher, the next generation of ultra large screen display Plasma Tube Array (PTA) research center

Research subjects :

The development of special image processing technology for the next generation of ultra large screen display Plasma Tube Array (PTA). Independent development of the PTA special image processing system and the logic circuit control system

the optimization of high-voltage driver waveform for the next generation of ultra large screen display Plasma Tube Array (PTA) and Plasma Display Panel(PDP), also has designed the full function high voltage driver waveform generator

The influence of doping gas on discharge characteristics of Plasma Display Panel (PDP)

Lead development of video and image processing chips that generated $5 million in economic benefits

Hardware Design :The ASIC, FPGA design of video and image monitoring chips for display devices, including Algorithm Designing

(Matlab, C/C++), Architecture Design (SystemC, SystemVerilog), RTL Design (VHDL, Verilog HDL), System, Timing and Logic Verification

(ModelSim, SystemVerilog, FPGA, Cadence NCSim, Synopsys VCS), Physical Design (Floor planning, Place and Route, Layout, Clock Insertion, Cadence, Synopsys ICC)

Hardware Design : Japan Advanced PDP Development Center Corporation (APDC), The development of the Digital circuit control system based on FPGA and ARM, such as PDP, LED,LCD panels

Hardware Design : Fujitsu Laboratories Ltd. Shinoda Fellow Group Senior Researcher, the next generation of ultra large screen PTA research center based on FPGA and ARM

Hardware Design : the optimization of high-voltage driver based on FPGA

Image Processing : the development of video and image processing chips based on multi-frame image processing, Jitter and flicker processing, Low gray level image enhancement, Graphic edge detection, Brightness enhancement technology

Software Design : The development of special image processing technology based on MATLAB, C/C++

Mar 2000 ~ Oct 2006 Research institutes :

Xi’an Jiaotong University, Key laboratory for Physical Electronics and Devices of the Ministry of Education, School of Electronic & Information Engineering Status :

Ph.D.

Research projects:

The Ministry of Education of China (Granted No. [2002]77). Research subjects :

The development of memory and stored control circuit based on FPGA and the image processing technology research.

The development of multipurpose memory and control circuit and of a color AC- PDP motion image simulation system.

The Plasma Display Panel (PDP) quality improvement with many kinds of imagery processing methods

Sep 1997 ~ Mar 2000 Research institute :

Xi’an Jiaotong University, School of Electronic & Information Engineering Status :

M.E.

Research projects:

(1) Natural Science Foundation of China (Granted No. 19675029)

(2) The excellent young teacher fund supported by the ministry of education china (1996)

Research subjects :

The Research of analogous circuit using computer simulation method and its SPICE simulation and experimental study. The development of analogous circuit with computer simulation method and rapid accurate numerical approach for analogous circuit

Sep 1993 ~ Jul 1997 Research institute :

Xi’an Jiaotong University, Electricity department

Status :

B.E.

Research subjects:

Rapid and Accurate Simulation Research for Ripple Characteristics of Multi-stage Voltage Multiplier

EDUCATION

● The University of Tokyo, JAPAN

Postdoctoral Fellow, July 1, 2005 ~ November 30, 2006 Advanced Display Research Center, Institute of Industrial Science Advisor: Tsutae Shinoda

SID (Society for Information Display) Fellow, Fujitsu Laboratories Ltd. Fellow, Endowed Chair of Advanced Display Research Institute of Industrial Science in the University of Tokyo, Prime minister awards of Japan, Purple colorful silk ribbon medal, Society for Information Display, KARL FERDINAND BRAUN PRIZE, International Electrotechnical Commission IEC1906Award, IEEE Honorary Membership. Prof. Shinoda is well known as “father of modern PDP” in the world.

Research Subjects:

(1) The design of memory and stored control circuit based on FPGA and The development of logic circuit control system based on very high speed integrated circuit hardware description language

(VHDL) for the next generation of ultra large screen display Plasma Tube Array (PTA)

(2) The image processing engineering research for the next generation of ultra large screen display Plasma Tube Array (PTA) and Plasma Display Panel(PDP)

(3) The design of high-voltage driver circuit and the optimization of high-voltage driver waveform for the next generation of ultra large screen display Plasma Tube Array (PTA) and Plasma Display Panel(PDP)

(4) The influence of doping gas on discharge characteristics of Plasma Display Panel (PDP)

● Xi’an Jiaotong University, CHINA

Ph.D. March, 2000 ~ October, 2005

Key laboratory for Physical Electronics and Devices of the Ministry of Education, School of Electronic & Information Engineering

Thesis Title:

The Image Process Technology of Colored Plasma Display Panel

● Xi’an Jiaotong University, CHINA

M.E. September, 1997 ~ March, 2000

School of Electronic & Information Engineering

Thesis Title:

Rapid and Accurate Numerical Approach for Steady-stage Analysis of Multi-stage Voltage Multiplier

● Xi’an Jiaotong University, CHINA

B.E. September, 1993 ~ July, 1997

School of Electronic & Information Engineering

Major : Electronic Science & Technology

Minor : Computer Science & Technology

Thesis Title:

Rapid and Accurate Simulation Research for Ripple Characteristics of Multi-stage Voltage Multiplier

AWARDS

● 2011 Information Industry Whose Significant Technological Invention Award : "LTE Wireless Access Communication System with High Performance".

● 2011 Innovative Talents, In Shaanxi Province "Hundred People Plan".

● 2012 Xi'an Science and Technology Award "3G Mobile Broadband Network Terminal Access Enhancement Project."

● 2012 Xi'an High-Tech Enterprise Entrepreneur Award.

● 2013 Jinan City, Shandong Province, "5150 high-level entrepreneurial talent."

● 2014 Fifth China Overseas Chinese Contribution Award Winning, Innovative Talents

● 2014 Xi'an Science and Technology Award "Remote Digital Multimedia Integrated Information Platform" SOCIAL POSITION

● Chinese Institute of electronics senior member, membership number: E190006948S

● Shandong TelChina telecommunications limited liability company "State-level post-doctorate scientific research workstation" supervisor

VOCATIONAL EXPERIENCES

Hardware design Development Tools :

Skilled in Cadence and OrCAD and Allegro

Development Experiences :

The design of high-voltage circuit based on FPGA/ASIC

The design of multipurpose memory and control circuit based on FPGA/ASIC

Electric circuit board chart making for company and the Schematics and PCB design experience

ASIC design flow including emulation, prototyping, DFT, RTL coding

High-speed digital circuits, VLSI circuit design, video control, display technique, data storage and control (such as DDR, SDRAM) etc Digital circuit design Development Tools :

Skilled in QuartusII (Altera) and ISE (Xilinx) and Synplify and ModelSim and Aldec Active-HDL

Skilled in VHDL and Verilog HDL

Development Experiences :

The development of logic circuit control system based on very high speed integrated circuit hardware description language (VHDL) for the next generation of ultra large screen display (Plasma Tube Array (PTA) and Plasma Display Panel(PDP))

The design of memory and stored control circuit based on FPGA for the next generation of ultra large screen display (Plasma Tube Array (PTA) and Plasma Display Panel(PDP))

The design of random waveform generator for Plasma Display Panel(PDP)

The image processing technology research for the next generation of ultra large screen display (Plasma Tube Array (PTA) and Plasma Display Panel(PDP))

The hardware system development of the synchronous / asynchronous video card (wired / wireless) product based on FPGA and ARM, and software of MySQL/Oracle and Java

The development of digital circuit control system based on VHDL and Verilog HDL

The design of memory and stored control circuit based on FPGA/ASIC

The design of random waveform generator based on FPGA/ASIC

The image processing technology based on FPGA/ASIC Image processing

technology

Development Tools :

Skilled in MATLAB, C/C++

Development Experiences :

The development of image processing system for the next generation of ultra large screen display Plasma Tube Array (PTA)

The development of motion image simulation system for Colored Plasma Display Panel (PDP)

The research of analogous circuit using computer simulation method and rapid accurate numerical approach for analogous circuit Telecommunication

technology

Development Tools :

Skilled in Matlab, C/C++, OPNET

Development Experiences :

Communication technological research experience including research on standardization of the communication systems consists of 3G, 4G LTE, LTE-Advanced

The key technology research and simulation on PHY, MAC, MIMO, such as OFDM, Carrier Aggregation, Uplink Power Control (ULPC), Inter-Cell Interference Coordination (ICIC), and QoS, using Matlab, C++ and OPNET.

Intellectual property output for 3G and 4G communication standards, such as system and terminal product

Research and innovation of new product and new technology AWARDS AND SCHOLARSHIPS

2006 Shinoda Scholarship, in University of Tokyo. Advanced Display Research Center, Institute of Industrial Science

2000-2005 PhD student scholarships in each year from 2000 to 2005, in Xi’an Jiaotong University. 1997-2000 Excellent student scholarships in each year from 1997 to 2000, in Xi’an Jiaotong University 1993-1997 Excellent student scholarships in each year from 1993 to 1997, in Xi’an Jiaotong University PUBLICATIONS AND PAPERS

1. Wei Wei, Sun Jian, Guo Bingang. Influence of H2 addition on discharge characteristics of Ne-Xe in color alternate current plasma display panel. The European Physical Journal – Applied Physics[J]. (UT ISI : 000************, IDS Number : 145AZ)

2. Bingang Guo, Wei Wei, Chunliang Liu. Influence of wall-charge accumulation on the gas dielectric barrier discharge (DBD) in AC-PDP structure. Applied Physics Letters [J]. 2006. (UT ISI: 000************, IDS Number: 144JG)

3. Wei Wei, Sun Jian. New technique of preparing period dynamic correction for color plasma display panel. Journal of Xi’an Jiaotong University[J]. 2005. Vol.39 : 885-889. .(EI : 053********) 4. Wei Wei,Sun Jian. Enhancement of dynamic low gray levels in color plasma display panel. Journal of Xi’an Jiaotong University [J]. 2005. Vol.39 : 1366-1369. .(EI : 060********) 5. Wei Wei, Sun Jian, Color AC PDP Enhancement of Low Levels Image Quality with Dynamic Modifying Sub-Fields Code, ISTM/2005[J]. 2006. Vol.07 : 6418-6422. .(ISTP, IDS Number: BCZ22) 6. Wei Wei, Sun Jian. New dynamic composite addressing method for improving dynamic false contours on color plasma display panel. Journal of Xi’an Jiaotong University [J]. 2006. Vol.40 : 714-718. .(EI : 063*********)

7. Wei Wei, Sun Jian, Color AC PDP Enhancement of Low Levels Image Quality with Dynamic Modifying Sub-Fields Code, Academic Journal of Xi'an Jiaotong University[J]. 2006. Vol.18 : 126-130 8. Wei Wei, Sun Jian, Guo Bingang. Influence of H2 addition on discharge characteristics of Ne-Xe in color alternate current plasma display panel. Journal of Vacuum Science and Technology[J]. 2006. Vol.26. No.3. 204-206. .(EI : 063*********)

9. Wei Wei. A Time-Split Simulation Method for Dynamic False Contours of Motion Images in Color Plasma Display Panel. IEEE ICIE[J]. 2010. Vol.1, 145-8. (EI : 201***********) 10. Wei Wei. A New Synchronization Method for MIMO-OFDM Systems with CAZAC Sequence. IEEE ICIE[J]. 2010. Vol.4, 3-5. (EI : 201***********)

11. Wei Wei. Transition Area-Based Uplink Inter-Cell Interference Coordination. Mobile Communications[J]. 2009, No.22, 70-72.

12. Wei Wei. A Forward Tap Presetting methods of The Low Complexity. Mobile Communications[J]. 2010, No.10, 48-53.

13. Wei Wei. The New Implementation of Image in Color Plasma Display Panel. IEEE International Conference on Computer Application and System Modeling[J]. 2010. Vol.2. 662-664. (EI : 201***********) 14. Wei Wei. The Influence of Discharge Parameters H2 Gas in Color alternate current Plasma Display Panel. IEEE International Conference on Computer Application and System Modeling[J]. 2010. Vol.2. 678-681. (EI : 201***********)

15. Wei Wei. A Design Method of Multi-User Precoding Concatenation. IEEE International Conference on Computer Application and System Modeling[J]. 2010. Vol.2. 682-685. (EI : 201***********) 16. Wei Wei. The Fast Handover Method of Relay Station based on Priority Messages. IEEE International Conference on Computer Application and System Modeling[J]. 2010. Vol.2. 694-696. (EI : 201***********)

17. Wei Wei, Tian Xiaoping, The implementation method of control channel transmit diversity based on the joint use of time and encoding diversity, 2011 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference, CSQRWC 2011[J]. 2011, 730-732. (EI : 201***********)

18. Wei Wei, Tian Xiaoping, The handover method of service channel in the relay network, 2011 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference, CSQRWC 2011[J]. 2011, 733-735. (EI : 201***********)

19. Wei.Wei. Image Enhancement Technology Based on Brightness Control in Color Plasma Display Panel. Video Engineering[J]. 2010, Vol.34. No.11. 51-56

20. Wei Wei, Lu Chen. Fast Handover Method Based on Priority Information for Digital Network Equipment. Video Engineering[J]. 2011, Vol.35. No.13. 64-66

21. Wei Wei. On Cloud Computing Technology and Cloud Wisdom[J]. 2010, Vol.15. No.6. 113-116 22. Zhang Haibo, Wei Wei, Zhou Ying, Feng Renjian. Rapid and Accurate Numerical Approach for Steady-state Analysis of Multi-stage Voltage Multiplier. High Voltage Engineering[J]. 2000. Vol.26. No.3. 1~3 .(EI : 001********)

23. Wei Wei, Huang Qiongdan. On Cloud Computing Technology and Cloud Wisdom. Journal Of Xi’an University Of Posts And Telecommunications[J]. 2010. Vol.15.No.6. 1~5 24. Wei Wei. Image Enhancement Technology Based on Brightness Control in Color Plasma Display Panel. Video Engineering[J]. 2010. Vol.19. No.51-52, 56

25. Wei Wei, An Wendong. An improved adaptive bit allocation algorithm for OFDM system. Journal Of Xi’an University Of Posts And Telecommunications[J]. 2014. Vol.19. No.49-52 26. Mao Jianhua, WeiWei. Energy compensation analysis of GSM data card. Journal Of Xi’an University Of Posts And Telecommunications[J]. 2013. Vol.18. No.36-38, 65 27. Mao Jianhua, WeiWei. Application of IIC bus master transmission and master reception mode. Journal Of Xi’an University Of Posts And Telecommunications[J]. 2013. Vol.18. No. 38-41 28. Zhang Liping, WeiWei. Implementation of Channel Interleaving of Broadband Carrier Power Line Communications Protocol Based on FPGA. Electronic Science and Technology[J]. 2015. Vol.28. 74-76 29. Wei Wei, Liang Pei, Hai Yanglong. Design of remote monitoring of dynamic encryption and LAN based on LabVIEW. Laser Journal[J]. 2014. Vol.35. 100-102

30. Wei Wei. Notice of Retraction The news implementation of image in color plasma display panel. IEEE International Conference on Computer Application and System Modeling[J]. Vol.2. 662-664 (IEL 检索号 11667781)

31. Wei Wei, Sun Jian, Liang Zhihu, Liu Chunliang. Maximum Sub-Fields Number Method and Implementation for Color AC Plasma Display Panel. Vacuum Electronics[J]. 2004. No.5 : 15-17 32. Wei Wei, Sun Jian, Liu Chunliang, Liu Zhujun. Development of a Color AC-PDP Motion Image Simulation System. Vacuum Electronics[J]. 2004. No.3 : 27-30

33. Wei Wei, Sun Jian, Liu Chunliang. A Time-Split Simulation Method for Dynamic False Contours of Motion Images in Color Plasma Display Panel. Journal of harbin institute of technology[J]. 2006. (EI : 070*********)

34. Wei Wei, Zhang Feiteng. The Analysis Of The Transmission Signal Measured MIPI D-PHY. International Conference on Computer Science and Software Engineering[J]. 2014. 2078-2081. (EI : 201***********) 35. Wei Wei, An Wendong. Adaptive Bit Allocation Algorithm for OFDM System. International Conference on Computer Science and Software Engineering[J]. 2014. 2161-2164. (EI : 201***********) 36. Shi Tieling, Liang Zhihu, Wei Wei, Liu Chunliang. Dynamic Integral Method for Evaluating Dynamic False Contours of Motion Images in Color Plasma Display Panels. Journal of Vacuum Science and Technology [J]. 2003. Vol. 23(3) : 156-160. .(EI : 034********)

37. Liang Zhihu, Liu Chunliang, Du Chunyan, Wei Wei. New Equivalent Circuit Model for Alternating Current Plasma Display Panel. Journal of Xi’an Jiaotong University [J]. 2003. Vol. 37 : 1067-1070. .(EI : 041********)

38. Liang Ning, Liang Zhihu, Wei Wei, Sun Jian. Error diffusion technology in color PDP and its improvement. TV Engineering[J]. 2002. No.9 : 71~73

39. Liang Ning, Liang Zhihu, Wei Wei. Dynamic Low-Level Image

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