Product Development Design Engineer

Bhupendra R. Kapoor

Top Secret Clearance

(The candidate is local to Gilbert, AZ but is ready to relocate to client location(s) within USA) Summary:

• Responsible, motivated and self-driven Electrical EMC Engineer who is contributory team player with more than 20 years of technical hands-on experience in EMC Technical Management, EMC design, EMC test & validation, Signal & Power integrity (SI) Simulations, safety, Acoustics Design and product development for Medical Instrumentation, PCs, Servers, commercial desktops, minitower workstations, HDDs, Wireless products,optical modules and Automotive Infotainment and other automotive applications in Electric car design.

• Over 20 years of hands-on experience in EMC Technical Management, design, testing, and validation for diverse products including medical instrumentation, automotive applications, and wireless products.

• Expertise in designing to various EMC compliance standards such as EN55022, IEC61000 series, MIL-STD 461G, and MIL-STD-464F.

• Experienced in PCB design, component layout, and stack-up optimization for EMC, with proficiency in tools like Mentor Graphics Xpedition, Cadence Allegro, CST, HFSS, and Hyperlynx.

• Practical knowledge in conducting EMC, immunity, product safety, and prototype testing, and familiar with equipment/software like TILE, TESEQ, and EMC measurement tools.

• Skilled in mentoring and providing EMC training for engineers, including in-depth educational programs at companies like OpLink, Intel, and Harman.

• Strong background in Signal Integrity (SI) and Power Integrity (PI) simulations using various software tools including XTK, PowerSI, Hyperlynx, and MWO.

• Involved in EMC design for automotive infotainment systems, wireless products, optical modules, and telecom products with an emphasis on compliance and immunity.

• Technical expertise in product development, quality engineering, acoustics design, and troubleshooting across various industries including medical instrumentation and automotive applications.

Skills:

• Practical Hands-on experience in designing on various EMC Compliance requirements for various EMC test standards including EN55022, EN55032, IEC61000-3-3, IEC61000-4-2, IEC61000-4-3, IEC61000-4-4, IEC61000-4-5, IEC61000-4-6, IEC61000-4-11, DO-160, MIL-STD 461G and MIL_STD-464F.

• EMC Management: Managed EMC and SI Labs for their effective operation, organization, upgrade, budgetary control and management of the equipment and training of personnel.

• Hands on experience with software tools used for board layout and simulation such as PCB EDA Mentor Graphics Xpedition. Other software tools such a Cadence Allegra, Hyper lynx, CST and HFSS etc.

• EMC Design: Design of PCBs, component layout and card stack up to optimize EMC. Experience various software tools. Identification of the sources of noise generation and their root cause analysis to mitigate electrical noise at system, PCB and at chip level. Die and substrate analysis to optimize power delivery, I/Os and parasitics for the layout. Problem solving expertise in EMI, EMS, ESD, LSS, at card and chip level. Time line integration of the EMC design process as part of the product development cycle.

• EMC Test & Validation: Practical Hands on experience in conducting all kinds of formal and informal tests including EMC, Immunity, product safety, prototype testing & troubleshooting. Well versed in EMC compliance standards: FCC, Heavy Industrial standard, CE (CISPR/IEC), C- TICK (Australia and New Zealand) and VCCI (Japan). MIL-STD-461 & 462 E & F etc. Familiar with all EMC equipment and related software (Including TILE & TESEQ etc.) for measurement, calibration and site attenuation. Reviewed and approved formal FCC and EU CE mark reports. Prepared EMC test plans during product development cycle.

• EMC Mentoring & Training: Provided instructions in different aspects of EMC, mainly in HF PWB layout, Differential traces, Crosstalk mitigation by design, Power delivery and S- parameters and EMI Troubleshooting to Analog & Digital Design engineers. Designated as the Main EMC Educational coordinator for the main OpLink ( Molax Corp) Inc. Main plant site at Woodland Hills, CA.

• Signal integrity (SI) & Power Integrity (PI Simulations: Hands-on experience in simulating PCBs, chips and chipsets for crosstalk, transmission line (TL) and resonance effects. Optimized PCBs, die and substrate noise due to I/Os, power delivery and parasitics of the components using various IBIS models with various simulation tools such as XTK, PowerSI, HYPERLYNX, ZELAND, ADS, HFSS (3-D simulation), CADANCE ALLEGRO, and MWO

(Microwave Office by AWR for RF layout) to study the behaviors of various signal waveforms under the defined parameters. Also used these tools for pre- and post-PCB layout and also for ICs (Silicon) for radiated emissions. Also used ALLEGRO, Altium and MENTORGRAPHIC Software tools for HF PCB board layout, power delivery, Crosstalk Analysis and decoupling.

• Wireless Product Development: EMC & Immunity design of Handheld wireless products like pagers, cell phones and VHF products of 3GIO (3rd generation input/output) and SATA.. Testing of wireless (Wi-Fi and cellular 3G & 4 G modems etc. Wireless testing –WLAN and Cellular.

• Optical Modules and Telecom: Exposed to the testing and design of optical modules and transponders from the EMI and ESD point of views for compliance up to 40 GHz range.

• New Product Development: Provided support for new Product Development cycle, Quality and Reliability Engineering (PDE) Project Management and product development for new products design and trouble shooting. Implemented Statistical quality control and reliability modeling, burn-in and life testing of new products.

• Acoustics Design and Testing: Provided acoustics design guidelines and compliance for Medical products

• General: Well-versed with Microsoft Windows 2003-8, Windows-XP, MSWord, MSPower Point, EXCELL, Adobe Acrobat, 3-D Visio for circuit analysis, Microsoft Project Scheduler and digital camera. Familiar with Matlab and MathCAD tools. Effective communicating skills with good command of written and spoken English. Experience in technical management of EMC and Safety lab.

Education:

• M.S (EE): Northrop University, Inglewood, Los Angeles, CA (GPA 3.88/4.00).

• M. Phill: Applied Mathematics and Physics: Institute of Advanced Studies, GPA 3.66/4.00

• M.S. Applied Mathematics and Statistics: Institute of Advanced Studies (GPA 3.00/4.00)

• Partially completed Ph.D degree (UCLA) – completed most of the course work except the thesis.

Experience:

Northrop Grumman Corp, Woodland Hills, CA 04/2020 – 08/2024 Sr. Principal EMC Design Engineer

Worked on various Products such as EGI-M, LN-200 and lately GBSD (Ground Based System Defense) for ballistic missiles and NIMS (Nuclear Intercontinental Mission System) project. Provided EMC design guidelines for NIMS project including NIMS CCA’s including flexible cables and connectors etc. Took part in the SI, PI and EMC Design rule checking with the help of Cadence, Hyper Lynx and CST software tools. Provided EMC guidelines for the whole department and conducted educational courses and also provided mentoring. Worked as Subject Matter Expert

(SME) for NGC and provided active support for EMC test, EMC troubleshooting, SI and PI and laid the professional guidelines for making EMC to be an integral part of the product development cycle. I do have top security clearances

• Provided guide lines for the improvement in the EMC Lab.(EMC lab Report)

• Completed Control Plan and Test plans for various projects.

• Completed Test plans for various projects with GBSD

• Provided guidelines for troubleshooting and training to the EMC Test Engineer and technicians

• Provided mentoring for newly hired interns and technicians out of regular working hours

• Simulated EMC design rules through Hyperlynx, CST and Cadence Allegro

• CST

• HFSS (High Frequency Structure simulation)

Harman Automotive Systems Inc, Farmington Hills, MI 12/2016 – 02/2020 Sr. EMC Design Engineer

Explored the EMC design aspects of the various products at Harman Inc which included all kinds of electronic gadgets used inside the Electronic self-driven Car. Took active part by working with the various HW teams to make EMC design an integral part of product development cycle in the Electric Car Infotainment System mainly design of Home car Audio (Kardon), Car Speakers (JBL), Amplifiers, Microphone & head phones (AKG), displays and antennas etc.

• Conducted EMC training classes for Analog and Digital design engineers.

• Took active part in the trouble shooting and prototype testing in the Pre-Compliance lab.

• Helped in the calibration of lab equipment and also trained EMC technicians. Intel Corp, Chandler, AZ 07/2013 – 10/2016

Sr. Product Regulatory (EMC) Engineer

• Worked as a Sr. Product Regulatory Engineer in designing, troubleshooting and testing of various products from the safety, conducted & radiated emissions point of view which included component level EMC design for Automotive applications.

• Responsibilities also included designing and testing for wireless and cellular cards with antennas Work with Engineering, Marketing and Sales department in obtaining compliance certifications on Safety and EMC compliance requirements for worldwide regulatory compliance.

• Completed a 3 weeks ADAS training for Automotive Functional safety conducted by TUV Nord of Hamburg, Germany,

• Provided technical guidance for various Intel products for worldwide compliance including CISPR-25 (A & B compliance for Automotive EMC compliance requirements).

• EMC Education and Training coordinator for for HW design engineers and technicians for EMC labs

LEAR CORP, SOUTHFIELD, MI 03/2010 – 5/2013

EMC Expert (Sr. Electrical Staff (EMC) Engineer, Hybrid Electric Car Division)

• Worked as EMC Expert for Lear Corp.

• Lear Corp is actively involved in the Electrical design part of Hybrid Car (Fully Electric car) and is a main supplier to General Motors (GM) and Ford Motor Corp.

• Lear is involved at the moment with designing chargers which Involves design for switch mode power supply, BDDU and Cordset which are part of the Electronics for Hybrid cars.

• I am actively involved in designing PCBs, and troubleshooting of Chargers for Hybrid cars which involves lying out of the board, HFSS simulation, designing of PS filters and Lightning surge protection etc.

MASIMO (MEDICAL INSTRUMENTATION) CORP, IRVINE, CA 02/2008 – 02/2010 Sr. Electrical Design Engineer (EMC)

• Responsible for EMC system design for medical & diagnostic instruments for compliance to EMC, Immunity, Safety & Acoustics Design & tests.

• Performed EMC simulation and reviewed signal integrity of the HF PCB’s.

• Performed final EMC testing on integrated products, which include supporting peripherals.

• Provided guidance to remedy EMC, Acoustics and safety issues and proposed solutions for troubleshooting, when necessary.

• Took part in the design cycles of Rad-5, Rad-8, & Rad-87 family of products and recommended EMC and Acoustics guidelines for time line integration of recommendations into the product development design cycle.

OPLINK COMMUNICATION Inc., WOODLAND HILLS, CA 11/2003 – 11/2007 Sr. EMC Compliance Engineer

• Responsible for the EMC design and testing of Optical Modules used in telecommunications with the help of GTEM Cell and TILE Software. Work also involved, in addition to EMI and Immunity design & testing, designing and testing for ESD as per IEC61000-4-2, LSR, FET, D & I etc. Worked as head of the EMC Engineering Lab with 3 technicians and 3 Engineers.

• In-charge of various products and main trouble shooter for various customers on EMI/ESD and EMS problems.

IBM Corp, RTP, NC 6/1989 – 6/2003

Staff EMC Design Engineer Provided technical support for EMC and signal integrity issues on wireless products, 2-way pager with Internet connections (Palatki and Showlow), Caynosa, Solano, Bulverde and guided the formal EMC Tests.

• Took active part in developing a uniform systematic EMC design procedure to become an integral part of product development cycle.

• Conducted classes and tutorials on “Control of EMC on PCB” and “EMC Mitigation Techniques in PCB and Chip design”.

• PCB layout and placement of components on the PCB and EMC mitigation in chip design. • immunity tests –ESD, PLD, PLT and LSR.

• Conducted EMC analysis using fully automated Semi-Anechoic Chambers (SAC) with voice automation. • Provided EMC Design for various fast speed PCs, Laptops, commercial desktop and Minitowr ORGANIZATIONAL PUBLICATIONS: • Determination of the Optimum Burn-In time and the enhancement of MTTF

• Techniques of Product Protection from Lightening Surge Susceptibility (LSS) • Acceleration Factor (AF) at 120-degree F and Burn-In effectiveness. • Fundamentals of EMC design • Noise Suppression in Printed Circuit Board (PCB), “Printed Circuit Board

(PCB) – an EMC viewpoint

• PCB layout and placement of components on the PCB and EMC mitigation in chip design.

• immunity tests –ESD, PLD, PLT and LSR.

• Conducted EMC analysis and troubleshooting using fully automated Semi-Anechoic Chambers (SAC) with voice automation.

• Provided EMC Design for various fast speed PCs, Laptops, commercial desktop and Minitowr Computers.

Organizational Publications:

• Determination of the Optimum Burn-In time (OBIT) and the enhancement of MTTF

• Techniques of Product Protection from Lightening Surge Susceptibility (LSS) including HIRF

(High Intensity Radio Frequency)

• Acceleration Factor (AF) at 120-degree F and Burn-In effectiveness.

• Fundamentals of EMC design

• Noise Suppression in Printed Circuit Board (PCB), “Printed Circuit Board (PCB) – an EMC Viewpoint.

Viewpoint

• EMC Mitigation Techniques in HF PCBs and Chip design.

• Crosstalk Analysis and Mitigation in HF PCBs.

• Design for Switching power supplies (SMPS)

• Power Integrity (PI) and decoupling.

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