Design Engineer Technical Lead

JEYALAKSHMI KANNIAH

Hardware Design Engineer

Phone:479-***-**** Email: ***********@*****.***

Summary :

Dynamic and goal-driven professional with 11+yrs of experience spanning a full range of Hardware board design, development, testing, EOL support & system level testing support across multiple platforms and environments

Professional Experience

Technical Lead

HCL America Solutions Inc - January 2023 to September 2023 Key Deliverables:

• Perform regular reviews on the BOM and do the scrubbing using the Silicon Expert tool

• Manage the BOM Portfolio

• Searching for new or replacement parts for High Risk Components (if part is EOL or Non-ROHS or Long Lead time or any other issues), technical information, second sources, etc. using industry standard and internal tools.

• Prepared the Like to Like Analysis and Provide the solutions for High Risk components

• Analysis of PCN's from manufacturers for impact to current fielded designs and Provide formal reports.

• Supported the supply chain costing analysis and share the formal reports. Technical Lead

HCL Technologies - October 2011 to April 2017

Key Deliverables:

• Performed design, and documentation of PCIe Gen1&2 FPGA based boards

• Compiled, analyzed and defined requirements.

• Identified required components and Defining initial cost

• Prepared the Power calculation and power section design

• Prepared the needed analysis like thermal, IO compatibility, SI analysis

• Developed Schematics and entry in Allegro Concept HDL.

• BOM generation and risk analysis and mitigation.

• Generating Netlist and coordinating with CAD engineer for Layout and review

• Performed board bring-up, DVT and system level integration.

• Identified and resolved key design issues to ensure full functionality and compliance with product requirements.

• Performed the EOL support

Hardware Engineer

Sanmina-Sci Pvt Ltd - April 2011 to September 2011 Key Deliverables:

• Creating the part number for new component and new modules

• EOL Support activities

Hardware Engineer

Nicheken Technologies Pvt Ltd - April-2007 to April 2011 Key Deliverables:

• Understanding the product requirement

• component selection and defining initial cost.

• Calculated overall power budget.

• Prepared the various type of analysis like power, thermal, IO compatibility

• Developed Schematics

• Symbol creation and Schematics entry in ORCAD.

• BOM generation and risk analysis

• Generating Netlist and completed the layout using the ORCAD tool

• Performed board bring up and supports system level integration testing Tools Used :

Schematic Entry Tool : ORCAD Capture and Concept HDL Layout Tool : Strong knowledge in Orcad, Basic knowledge in Allegro and Mentor expedition

Analysis Tool : FPGA Power Analysis,LTSpice, LTpowerCAD, Hyperlynx-SI & PI, Hspice BOM Scrubbing Tool : Silicon Expert tool and IHS

Educational Qualification:

* Bachelor of Engineering in Electronics & Instrumentation - (Anna University) April 2006

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