Phone Myat Paing
******@******.*** 240-***-**** https://www.linkedin.com/in/pmpaing/
EDUCATION
Purdue University West Lafayette, IN
Master of Science in Electrical and Computer Engineering Expected May 2026 Bachelor of Science in Computer Engineering Aug 2021 – Dec 2024
• GPA: 3.7 / 4.00
• Coursework: Computer Architecture, Data Structures, Computer Security, Python in Data Science, Object- Oriented Programming, Microprocessor Interfacing, ASIC Design and Verification, Embedded Systems EXPERIENCE
GPU Architecture SoCET – Graduate Research Assistant Aug 2024 – Present
• Implemented the V1 architecture by integrating scalar and SIMT cores to address control flow divergence
• Modified the Vortex GPGPU scheduler in C++ to isolate highly divergent threads for processing
• Research and verify hardware solutions for control-flow divergence to implement into current architecture National Kidney Foundation – Full Stack Developer Intern Aug 2023 – May 2024
• Used Flutter and Dart to develop a mobile app for chronic kidney disease patients to manage their diets
• Developed barcode scanning, search, login, and PDF generation with Firebase and the Nutritionix API
• Consistently updated iOS and Android builds to update bug fixes and provide users with latest features Purdue University
ECE 570: Artificial Intelligence – Undergraduate Teaching Assistant Jan 2024 – Dec 2024
• Supported over 200 students’ understanding of artificial intelligence concepts through debugging sessions and clarification on mathematical concepts during office hours ECE 404: Computer Security – Grader Jan 2024 – May 2024
• Managed efficient grading to provide feedback for 150 student’s Python code on security protocols ECE 301: Signals and Systems - Undergraduate Teaching Assistant Aug 2023 – July 2024
• Helped over 150 students to understand design and analysis of discrete and continuous-time linear systems Beyond 5G – Undergraduate Research Assistant Aug 2023 – Dec 2023
• Collaborated with members to identify, deploy, and unit test to improve communication performance
• Programmed a range of hamming codes in C/C++ to test accuracy and produce an error probability curve PROJECTS
Senior Design Application Portal – EPICS Jan 2024 – Dec 2024
• Utilized ReactJS and HTML/CSS to develop an application portal for Purdue students and professors
• Implemented two-factor authentication and displaying project details using queries with MongoDB
• Created dynamic document exportation for uploaded student work using cloud functions and RESTful APIs RISC-V ISA Processor Aug 2024 – Dec 2024
• Designed a dual-core CPU in System Verilog using RISC-V ISA with pipelines, caches, and cache-coherency
• Verified functionality by creating test-benches, unit-test assembly files, and synthesizing on a FPGA USB Full-Speed Bulk-Transfer Endpoint AHB-Lite SoC Module March 2023 – May 2024
• Designed TX Module, Data Buffer, and AHB Bus in SystemVerilog for USB AHB-Lite SoC Module
• Created RTL diagrams for modules with pseudocode or state transition diagrams for smooth design process
• Implemented test benches in SystemVerilog and used Synopsys Design Compiler to verify functionality Zero-Shot Learning in Image and Text Analysis Aug 2023 – Dec 2023
• Developed a multimodal architecture for zero-shot image captioning with 90% accuracy by integrating the CLIP model with GPT-2 in a PyTorch framework
• Deployed Python’s transformers and NLTK libraries to develop and evaluate the model’s performance FPGA Drum Machine March 2023 – May 2023
• Utilized SystemVerilog for hardware description and unit-testing, ensuring accurate functionality
• Implemented control logic and interface to enable user interaction to play and store music through keypads SKILLS
Languages
• Python, C/C++, MATLAB, Dart, React, Node.js, SQL, Verilog/System Verilog, HTML/CSS, JavaScript, Assembly Tools/Frameworks
• Firebase, Git, Linux/UNIX, Flutter, Colab, FPGA, SPICE, CAD, AWS, Virtuoso, MongoDB, QuestaSim