P. Dehghanzadeh, PhD Sep **, ****
Peyman Dehghanzadeh, Ph.D.
Warren B. Nelms Institute for the Connected World
Postdoctoral Researcher at the University of Florida Department of Electrical & Computer Engineering (ECE) 1889 Museum Road, Gainesville, FL 32611
Phone: +1-334-***-****
Email: *.************@***.***
LinkedIn: https://www.linkedin.com/in/peyman-d/
Google Scholar: https://scholar.google.com/citations?hl=en&user=MAeZrZcAAAAJ Professional Summary
I am a Postdoctoral Researcher at the University of Florida with a strong background in RFIC/Analog IC Design with specific emphasis on security and intelligence. My research is driven by a commitment to advancing these fields through innovative, interdisciplinary approaches and collaboration with leading experts from industry and academia. I aim to contribute to groundbreaking research in my future position. Research Interests
• Analog IC Design
• RF and RFIC Design
• Compute in Memory
• Hardware Security and Trust
• Bioimplantable and Wearable Systems
Technical Skills
Education
Ph.D. 2020 – 2024 University of Florida, Gainesville, FL, USA, Electrical and Computer Engineering Thesis “Hardware Primitive for Low Power, Low area and High-Speed Edge Intelligence” Advisor: Professor Swarup Bhunia, IEEE Fellow
Dissertation Committee: S. Bhunia (chair), S. Ray, W. Eisensdadt, and S. Rampazzi M.S. 2014 – 2016 Azad University, Esfahan, Iran, Electrical Engineering-Electronics Title: “Low Voltage, High Speed Double-Tail Comparators” B.S. 2002 – 2007 Azad University, Esfahan, Iran, Electrical Engineering-Communications Research Experience
July 2024 – Present Postdoctoral Researcher, Warren B. Nelms Institute of the Connected World, University of Florida, Gainesville, FL, USA
Aug 2020 – July 2024 Graduate Researcher Assistant, Warren B. Nelms Institute of the Connected World, University of Florida, Gainesville, FL, USA
Analog IC
• MOS-Based Amplifiers
• Operation Amplifiers
• Current Mode Amplifiers
• Miller, NM Compensation
• Band Gap Reference, BGR
• Switched Capacitors Circuits
• Gm-C Filters
Digital IC
• Digital Logic Design
• Comput in Memory
• Arithmetic Circuit Design
• Hardware Security primitives
• FPGA-based design
• DACs/ADCs
• HDL, Verilog
RFIC
• LNA
• Mixers
• Oscillators
• VCO
• PLL
• Power Amplifiers
• Synthesizer
Software
• Cadence Spectre
• Cadence Virtuoso
• ADS
• Altium Designer
• Kicad
• LTspice
P. Dehghanzadeh, PhD Sep 01, 2024
Teaching Experience
Aug 2023 – Dec 2023 Graduate Teaching Assistant, VLSI Circuits and Technology 2 Electrical and Computer Engineering (ECE),
University of Florida, Gainesville, FL, USA
Jan 2024 – May 2024 Graduate Teaching Assistant, Hands-On Hardware Security Electrical and Computer Engineering (ECE),
University of Florida, Gainesville, FL, USA
Industrial Experience
May 2022 – Aug 2022 Analog Design Intern
Texas Instruments
Dallas, TX, USA
Dec 2009 – Jul 2018 Technical Manager
Faradis Alborz Corporation
Esfahan, Iran
Publications
Published
• P. Dehghanzadeh, A. Madanayake, H. Zhao, S. B. Venkatakrishnan, and S. Mandal, "A Multiport Self-Interference Canceller for Wideband SIMO/MIMO-STAR Full-Duplex Arrays", in IEEE Transactions on Microwave Theory and Techniques, vol. 72, pp. 2640 – 2654, 2024. doi: 10.1109/TMTT.2023.3315797.
• P. Dehghanzadeh, J. Huan, R. R. Kalavakonda, S. Mandal, and S. Bhunia, "On-Chip Batteries as Distributed Energy Sources in Heterogeneous 2.5D/3D Integrated Circuits", in IEEE Access, vol. 11, pp. 898**-*****, 2023. doi: 10.1109/ACCESS.2023.3305593.
• J. Huan, P. Dehghanzadeh, S. Mandal, and S. Bhunia, "Contact-Less Integrity Verification of Microelectronics Using Near- Field EM Analysis”, in IEEE Access, vol. 11, pp. 805**-*****, 2023, doi: 10.1109/ACCESS.2023.3300222.
• T. Kaisar, P. Dehghanzadeh, P.X.-L. Feng, and S. Mandal, "Digitally Programmable CMOS Feedback ASIC for Network of Coupled Electromechanical Oscillators", 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA, pp. 1-5, 2023, doi: 10.1109/ISCAS46773.2023.10182172.
• K., Horace-Herron, P. Dehghanzadeh, S. Mandal, and S. Bhunia, “Non-invasive authentication of mail packages using nuclear quadrupole resonance spectroscopy”, Sci Rep 13, 5546,2023. https://doi.org/10.1038/s41598-023-31497-9. Submitted & Under-Review
• P. Dehghanzadeh, B. Chatterjee, and S. Bhunia, “LUNA-CIM: Lookup Table based Programmable Neural Processing in Memory”, in IEEE Transaction on Computers, TC.2024.02.0113.
• P. Dehghanzadeh, B. Chatterjee, and S. Bhunia, “Multi-Functional Memory-Based PUF for Distributed Entropy Generation and Storage”, in IEEE Transaction on Very Large Scale Integration (VLSI) systems, TVLSI.00558.2024.
• P. Dehghanzadeh, S. Mandal, and S. Bhunia, “MBM-PUF: A Multi-Bit Memory-Based Physical Unclonable Function”, in IEEE Transaction on Circuits and System I, TCAS-1-017**-****. (Revesion Under Reviewe)
• O. Sen, C. Ogbogu, P. Dehghanzadeh, J. Doppa, S. Bhunia, P. Pande, and B. Chatterjee, “Scalable and Programmable Look- Up Table based Neural Acceleration (LUT-NA) for Extreme Energy Efficiency”.
• P. Gaikwad, P. Dehghanzadeh, A. Dasgupta, and S. Bhunia “Hardware IP redaction using Programmable Logic Macros”
• R. R. Kalavakonda, J. Huan, P. Dehghanzadeh, A. Jaiswal, and S. Bhunia “A Paradigm for Merging Natural and Artificial Intelligence” in IEEE Internet of Things, IoT-38348-2024. Ongoing Research Publications
• P. Dehghanzadeh, B. Chatterjee, R. R. Kalavakonda, A. Dasgupta and S. Bhunia, “Pasteable: A Secure On-Body Health Monitoring Platform”, 2025 IEEE International Symposium on Circuits and Systems (ISCAS)
• P. Dehghanzadeh, B. Chatterjee, and S. Bhunia, “Look-Up Table-Based Computing for SIMD Applications”
• Reiner N. Dizon-Paradis, P. Dehghanzadeh, R. R. Kalavakonda, and S. Bhunia, “FITNESS: Feedback-Integrated Pasteables Platform for Tracking and Enhancing Sports Performance”
• Reiner N. Dizon-Paradis, P. Dehghanzadeh, R. R. Kalavakonda, and S. Bhunia, “Pasteables: A Collaborative, Modular, and Reconfigurable Platform for Edge Computing”
P. Dehghanzadeh, PhD Sep 01, 2024
Conference Presentations
• P. Dehghanzadeh, K. Horace-Herron, M. Naren, and S. Bhunia, “Towards a Handheld Nuclear Quadrupole Resonance (NQR) System”, 63rd ENC Conference, April 24 - 29, 2022, Orlando, FL. ~poster
• T. Kaisar, P.Dehghanzadeh, P. Feng, and S. Mandal, “Digitally programmable CMOS Feedback ASIC for Network of Coupled Electromechanical Oscillators”, 56th ISCAS Conference, May 21 - 25, 2023, Monterey, CA. ~poster Patents
Published
• “Systems And Methods for Providing Distributed Batteries in Integrated Circuits”, S. Bhunia and P. Dehghanzadeh, US20240234345A1.
• “Systems And Methods for Programmable Logic Macros”, S. Bhunia, P. Dehghanzadeh, J. Cruz, and G. Gaikwad, US20240232491A1.
Invention Disclosures
• “MBM-PUF: A Multi-Bit Memory-based Physically Unclonable Function” S. Bhunia, P. Dehghanzadeh, and A. Chatterjee, Tech ID.: T19426 (2024).
• “Fusion Intelligence: System and Methods to Combine Natural Intelligence with Artificial Intelligence in IoT Applications”, S. Bhunia, P. Dehghanzadeh, and J. Huan, Invention ID.: INV-240017, Tech ID.: T19134 (2023).
• “Look-Up Table-Based In-Memory Computing System”, B. Chatterjee, S. Bhunia, and P. Dehghanzadeh, Filed Provisional Application No.: 63/514386, 2023.
Ongoing Patent Application
• “Look-Up Table-Based Computing for SIMD Applications” S. Bhunia and P. Dehghanzadeh. Grant Proposal Contributions
• National Science Foundation (NSF): Proposal on Multi-Bit Memory-Based Physical Unclonable Function
• National Science Foundation (NSF): Proposal on Look-up Table (LUT) based Programmable and Efficient Compute-In-Memory (CIM) for Neural Processing within SRAM Arrays
• National Institutes of Health (NIH): Proposal on Real-Time Scoliosis Monitoring Using Wearable Sensors Credentials, Certificares and Achievements
• Cadence Virtuoso Layout Design, vIC6.1.8/ICADVM20.1, 2024
• Cadence Virtuoso Schematic Editor, vIC6.1.8/ICADVM20.1, 2024
• Nominated for ECE Excellence Award at the University of Florida, 2024
• Nominated for Alec Courtelis Award at the University of Florida, 2023
• Achieved 34th Rank out of 1100 Participants in the IAUN Entrance Exam for B.S Degree, 2001 Reference
• Prof. Swarup Bhunia, Department of Electrical and Computer Engineering, University of Florida, Gainesville, USA, Email: ******@***.***.***
• Prof. Sandp Ray, Department of Electrical and Computer Engineering, University of Florida, Gainesville, USA, Email: ******@***.***.***
• Dr. Baibhab Chatterjee, Department of Electrical and Computer Engineering, University of Florida, Gainesville, USA, Email: **********.*@***.***
• Dr. Soumyajit Mandal, Brookhaven National Laboratory, NY, USA, Email: *******@***.***