Design Engineer Back End
Resume:
GREGORY N. STESHENKO
APTOS, CA ***** 831-***-**** ********@*****.***
SUMMARY OF QUALIFICATIONS
Strong experience in definition, implementation and management of engineering projects
Strong background in hardware (analog and mixed signal, digital ASIC and FPGA/PLD, front and back end), software, systems design and DSP, plant motion control systems and Lenze PLCs
EDUCATION AND CERTIFICATIONS
San Jose State University Coursework in Hematology, Immunology, Medical Microbiology and Analytical Chemistry, San Jose, CA 2011- 2012 University of California, Bachelor of Science in Biochemistry and Molecular Biology Santa Cruz, CA 2007-2010
Cabrillo College Associate of Science in Biology Aptos, CA 2004-2010 University of Texas Master of Science in Electrical Engineering Dallas, TX 1994 EXPERIENCE
United States Postal Service Electronic Engineering Specialist San Jose, CA 2023
- Present
o Performing installations and troubleshooting of the USPS electronic equipment used in a plant for automated sorting of U.S. mail
o Developing fixtures and methodologies for testing and troubleshooting of electronic equipment
o Programming Lenze PLCs, CANopen bus Roller Speed Control Modules, CANopen bus-to-Ethernet bridges and other electronic motion and image acquisition related equipment of the plant
Was in school and performed numerous contracts
Precision Power and Technology Engineer-Consultant Watsonville, CA 2011 o Performed design and testing of the power, analog and digital electronics for the power supplies for RF inductive heating
TERAPOWER, INC Principal Engineer Cupertino, CA 2002 – 2005 o Implemented the mixed-signal part of a self-routing terabit switching fabric chip. Developed and implemented Design-for-Testability methodology for the mixed-signal interface circuits of that chips
o Participated in the research and development of the network routing algorithms
o Implemented a compact 3Gbps SerDes for the crosstalk-free realization of the multiple instances of it on a single chip
MITSUBISHI ELECTRIC AND ELECTRONIC USA, INC Senior Design Engineer, later Engineering Manager Sunnyvale, CA 1999-2002
o Managed implementation of a complete Transceiver and Serdes for 10Gbps Ethernet and Infiniband
o Designed a clock and data recovery (CDR) module
o Designed and verified a Zero-IF RF receiver integrated circuit kernel LOCKHEED MARTIN CORP. Senior Design Engineer Orlando, FL 1997-1999
Designed a radiation-hardened RF communication equipment for satellites
Designed a radiation-hardened low noise amplifier
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