Software Architect - Networking, Embedded C, Linux, L2L3, Ethernet, IP

Jagmeet Singh Hanspal

+91-991******* • *******.*******@*****.*** • linkedin.com/in/hanspal

WORK EXPERIENCE

HEWLETT PACKARD ENTERPRISE May 2018 - Present

Principal Engineer • Full-time Bengaluru

ERICSSON INDIA PVT LTD Apr 2012 - May 2018

Senior Technical Lead • Full-time Bangalore

JUNIPER NETWORKS Oct 2009 - Apr 2012

Senior Software Engineer • Full-time Bangalore

EDUCATION

POST GRADUATE

DIPLOMA in IT

Management

All India Management

Associaiton

New Delhi, India

BACHELOR OF

ENGINEERING in

Electronics &

Communications

CR State College of

Engineering

Haryana, India

SKILLS

Design & Architecture

Programming

Networking Protocols

Embedded Systems

Principal Architect with a 13 member (India) software team and 2 other locations (US and Singapore).

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Pioneered the design and architecture of AVB for HPE switches, ensuring low-latency across 7 hops & opening new business segment with seamless integration of AV traffic and IT network.

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Spearheaded the design of PTP for 6+ platforms and 20+SKUs, achieving <50ns synchronization and $100K+ deployments.

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High-Level overview of the Industrial Ethernet space with Ethernet/IP, TSN, DLR protocols used in Industrial Networks.

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Designed seamless software upgrades in VSX with sub 1-second traffic-interruption through traffic steering mechanisms.

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Explored viability of Private VLAN on Broadcom ASIC based HPE switching platforms with a 2 node multi-chassis LAG.

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Implemented L2TP LNS for Spider-Based 20x10GE cards, encompassing both design and development phases.

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Devised Sync-control and RPC features, enhancing PPPoE subscriber bring-up reliability to 100% from the previous 60%.

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Acted as Agile OPO, to define and drive features backlogs, enhancements and issue resolutions with JIRA tracking.

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Added Traffic-Steering capabilities for IPsec including NAT via DPI

(Deep Packet Inspection), which increased the data-security.

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Point of Contact for CPG (and GTP tunnel). Improved the subscriber look-ups by 2x by evaluating 5+ hashing techniques.

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Traveled to Budapest (Hungary) and concluded POS line-card bring-up within 2 weeks. Thereafter, integrated PPPoE and CHDLC protocols.

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Led feasibility & completion of SyncE on Terabit routers with ESMC protocol to achieve Frequency Lock from a Stratum-1 clock.

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Architectural insights for enhancing network routers to achieve IEEE 1588 PTPv2 functionality with sub 1 microsecond accuracy.

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Strategized diagnostics planning for T-series 4xOC-48 modules for debuggability, and reduced the bring-up time issues by 50%.

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Built IP DSCP class-of-service translation-tables infrastructure in the EZchip N/w processor in fastpath for 1/10/100 G ports.

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Conducted Class-Of-Service Unit-testing using Spirent Tester, ensuring functional correctness achieving 100% pass rate.

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• HLD & LLD

• Load Balancing

Performance

Optimization

•

Scalability &

Redundancy

•

• Stack Integration

• C Programming

• Network Processors

• Shell scripting

• Virtualization

• Audio Video Bridging

• Ethernet and IP

• IEEE 1588 PTPv2

• QOS Algorithms

• Sync Ethernet

• Device Drivers

• Embedded Linux

• Firmware

• Microcontrollers

• VxWorks RTOS

TRANSWITCH SEMICONDUCTORS Jan 2005 - Oct 2009

Senior Member Technical Staff • Full-time New Delhi FREESCALE SEMICONDUCTORS Jun 2004 - Jan 2005

Software Engineer • Contractor Noida

ALBA CONTROL SYSTEMS LTD May 2003 - Jun 2004

Embedded Systems Engineer • Full-time Noida

AWARDS & SCHOLARSHIPS

Route Optimization via Time-Series Traffic Prediction Jan 2019 HPE Hackathon

1st spot - Smart Conference Rooms with IoT Jan 2017 EngiNerd - Ericsson India

Aced the Ericsson L1-Leadership assessment Aug 2016 Ericsson

PDUIP Gold Partnership Award: Quality focus and Drive Jan 2014 Ericsson

Technology-Leadership Project: SDN Load-balancer Nov 2013 Ericsson

Innova & Best Experimentation Award Jan 2013

Ericsson Headquarters - SanJose, US

Patent: Method to determin Dynamic Queue Fill Levels Jun 2008 TranSwitch Semiconductors

Employee of the Year 1st Runner-up Jan 2007

TranSwitch Semiconductors

CERTIFICATIONS

Scientific Computing

with Python

Feb 2023 - Present

Freecodecamp

Data Visualization

Jan 2023 - Present

Freecodecamp

JavaScript

Algorithms and Data

Structures

Nov 2022 - Present

Freecodecamp

VOLUNTEERING &

LEADERSHIP

ESSCI - Electronics

Skill Sector Council of

India

Subject Matter Expert

Reviewed and improved

National Qualification-

Pack for the Skill India

Initiative as Subject-

Matter Expert -

Networking &

Embedded Systems.

EmTech Pvt Ltd

Founding Member •

New Delhi

Guided the strategic

development of EmTech

for embedded systems

education; strategized

creation of hands-on

projects leading to

more than 100 interns

excelling in competitive

technology roles.

Developed fast-path firmware for Ethernet & IP: Classification, Forwarding, QoS (trTCM, and WRED) for configurable packet- processing engine (CoPPEn) with 4 cores in 2 parallel pipelines.

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Traveled to Switzerland for training on CoPPEn simulator and Tool-chain. And to Boston, Connecticut, United States for next generation multicore platforms with 64 processing cores.

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Engaged in training on Project Management (PMBoK). Provided data-analysis for LoC vs Defects achieving 74% accuracy.

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Ported MontaVista Linux Kernel 3.1 to TranSwitch (Power-PC based) evaluation boards for first-boot and bring-up.

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Created an application on VxWorks RTOS to demonstrate 50 ms SONET protection switching.

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Optimized the performance of Embedded Flashing algorithms by 20% in execution time in the Code Warrior IDE.

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Ported the debug-agent (MetroTRK) onto 3 different H/w boards and BSPs.

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Collaborated with IIT Delhi startup for development of (ARM and Linux-based) Access Control System, replacing a $30K+ system.

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Re-engineered device-driver and front-end of the Access Control System for a 40%+ responsive system and fixing timeout errors.

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