DAVID W. KUHN

Austin, Texas

972-***-****

adzzeo@r.postjobfree.com

www.linkedin.com/in/davidwkuhn/

OBJECTIVE

Software Developer with emphasis on QA & Test Engineering.

Highly productive code creator and tester.

Test case design, implementation and automation and execution.

DEVELOPMENT TOOLS

Rally and Azure Dev Ops for agile methodology

Jenkins for CICD Build Automation

VMWare, Docker and VirtualBox

Intellij and Pycharm IDE’s

Dependency management with maven and pip

Azure Dev Ops and TFS for automated and manual test case management

TECHNICAL SKILLS

Python

Java

Cucumber

Robot Test Framework

SVN, Git for revision control

Appium

Microsoft SQL Server, Oracle, Postgres

Selenium

CERTIFICATIONS

ISTQB Foundation Certificate 2016

EXPERIENCE

1/23 – 6/23 Contractor at General Motors, Austin TX

Senior QA Automation Engineer, REST API Automation

Automated Test Development using Java and Cucumber

. Created automation solutions for Customer Identity Platform User Story Acceptance Criteria.

. Created new Features and Testflows in Cucumber to automate complex test sequences.

. Used my Java coding and development skills to develop methods for Cucumber step definitions.

. Automated using Rest Assured for REST API request automation and validation with Cucumber.

. Developed JDBC Database methods for Oracle and Postgres database access.

. Worked as Senior QA Automation Engineer in the Software Development team for

GM’s Customer Identity Platform.

. Participated in User Story refinement and pointing as a QA representative.

. Agile development on a fast paced Scrum team.

4/21 – 12/22 Coalfire, Austin TX

Software Developer In Test, ThreadFix Automation

Automated Test Development using Java and Selenium in an agile environment

. Manual and Automated testing for AWS hosted ThreadFix Web Application and it’s associated software scanners, Jenkins plugins and third party defect tracking systems.

. Created dynamic front end test automation using selenium.

. Added automation for new features and to add defect coverage for regression testing.

. Triage and evaluation of a large set of automated test suites.

. Reworked regression tests to increase test coverage and to fix failing automated tests.

Updated regression tests were instrumental in the detection and repair of

ThreadFix code regressions.

. Troubleshooting and refactoring test suites with automation failures.

. Ticket creation in JIRA for defects found during automated and manual testing.

4/17 – 2/21 AT&T Labs Contract Engineer, Austin TX

Automation Engineer, Cloudshell Automation

Automated Test Development using Cloudshell Automation, Test Case Development with Robot

. Trained for 6 months in Site Reliability Engineering, System Engineering and System Monitoring

. System Administration on large networked applications and Linux and Windows servers

. Championed Robot Test Automation Framework for Residential Gateway Systems Test Group.

. Developed Selenium, Appium, Telnet and REST Automation code in Robot

. Co-developed test automation framework in Python to automate residential gateway testing.

. Developed program to track device network client status between residential gateway devices.

. Developed and automated drivers to automate lab 3G and 4G testing tasks.

. Automation of Jira ticket creation and updates using Jira REST API.

. Maintenance and improvement on existing Cloudshell tests.

. Automation and control of tests using REST API’s with Python and Spirent iTest.

9/15 – 12/16 Polycom Inc., Austin, TX

Senior Test Automation Engineer, Video Endpoints Group

Automated Test Development in a Java Junit Framework

. Developed and automated API and Telnet testcases in Java from minimal documentation.

. Responsible for CICD execution, development and maintenance for Telnet API Java test suites.

. Test software development on an embedded system for Video Quality detection.

. REST software development in C++.and deployed in embedded environment

. Dashboard web chart development in Javascript in Angular2 with Python 3 backend.

3/15 – 9/15 Dell Contract Engineer, Austin, TX

Automation Engineer, Server Software Release Group

Development of automated tests in Python in a Pyunit Framework in a virtual Linux environment

. Developed and automated test cases from Rally user stories and server API documentation

. Automated test creation for Dell Server Automated CICD Build testing.

. Automated IPMI and WSMAN tests. Automated Redfish REST API testing.

7/13 – 1/15 HP TippingPoint, Austin, TX

Senior QA Automation Engineer, QA Automation Group

Test Development, Execution and Bug Reporting on Network Security Devices

. Developed and automated cross platform test cases from Rally stories.

. Automated tests for network security appliances using python in a linux environment.

. Automated quarantine response and reputation lookup and detection testing.

. Developed tests for Tippingpoint IPS, Next Generation Firewall and Converged IPS.

. Converted large number of tests to run on new platform using new polymorphic objects.

. Managed source code revisions with git and svn.

12/11 – 2/13, 6/13 Bridge360, Austin, TX

Software QA Engineer, QA Department

Test and Bug Reporting on Custom Software

. Developed automated network tests using python.

. Performed manual testing on Multimedia Games gaming products..

. Reviewed and contributed to IEEE 829 test plan for C# client server application..

. Created and deployed functional and negative test case in MTM and TFS.

. Manual test and bug reporting of cross platform mobile HTML5 video player application.

. Drove test coverage with creation and execution of targeted test cases for manual software test.

. Bug reporting with JIRA, TFS and Bugzilla.

9/08 – 11/11 Advanced Micro Devices, Austin, TX

Senior Test Engineer, Test Chips Group

Test Program Development for Proprietary Test Chips

. Improved program Time to Data at 1st Silicon by 1400% by structuring program for Data Analysis.

. Developed test programs in xml for 3 major yield / IP test chips on Credence Sapphire.

. Ported test chip test program from Credence Sapphire to Verigy V93K.

. Generated and validated xml program definitions created from extracted data using custom perl.

. Automated Test and supporting definition generation with perl and python scripts.

. Extracted Test Program definitions for validation, binning creation & for simulation environments.

. Controlled stil patterns generation, compilation, compositing and transfer using perl and scripts.

· Created java test template designed to vary equation specs and loop pattern bursts.

. Validated and debugged test program releases using software, offline and remote methods.

5/05 – 3/08 Texas Instruments, Dallas, TX

New Product Development Engineer, Mixed Signal Products Group

Product Development Mixed Signal Automotive Integrated Circuits

. Projects include two Anti-lock Braking Control Circuits, a Dual Variable Reluctance Sensor Interface and a Dual Linear Regulator / Dual Buck Switching Controller

. Located and removed setup issues in A567 test program for Anti-lock Braking Control Circuit

. Located and improved high variability tests with Gage Reproducibility and Repeatability study

. Proposed new search method for threshold test for Dual Variable Reluctance Sensor

. Corrected test program setup issue for Dual Linear Regulator / Dual Buck Switcher

· Product Characterization at wafer level, across temperature and across process split lots

. Correlated process control data with test parameters in extrapolation spreadsheet

2/98 – 5/05 Freescale Semiconductor, Austin, TX

Product and Test Engineer, Transportation Systems Group

Product and Test development, Non-Volatile Memory test lead, Burn-In / Wafer Level Burn-In test development and implementation for custom microcontroller used in Anti-lock and automotive control

· Product and Test Engineering on a high reliability automotive microcontroller used in

Anti-lock braking and control applications.

· Product Engineering lead for Flash & EEPROM Non-volatile memories.

· Co-developed and deployed J750 x4 probe program for > 300% manufacturing throughput improvement.

· Product Engineering participant in microcontroller product design with inputs in the design and test pattern development for Flash and EEPROM Non-Volatile Memory modules.

Contributions included testability enhancements such as state machine internal visibility features which were implemented in silicon.

· Silicon evaluation and module debug with emphasis on NVM.

· Additional design cycle contributions occurred in the development and implementation of the parallel wafer level burn-in circuitry used for production reliability and NVM data retention testing.

. Created standalone ADC test application for detecting cold temperature production issue.

. Developed code for and performed ADC characterization using Applicos bench test system.

· Automated extensive characterization of involving optimization of EEPROM programming

parameters during cycling. This included automatic execution of code, extracting of bit

threshold distribution data and control of IEEE 488 instrumentation. Automation using

perl code on the Sun platform and a serial GPIB controller allowed characterization to

be completed weeks ahead of alternative data collection methods.

· Automated device characterization using LabVIEW and GPIB controlled instruments.

· Developed assembly test routines forming the basis for operating life and quality test code as well as production wafer level burn-in and NVM data retention testing.

· Test development of Flash and EEPROM tests using assembly coded patterns, patterns generated in simulation and patterns utilizing memory tester hardware.

· Specified design of module exercise code and created / co-developed exercise code for some modules and integrated code into burn-in code.

· Specified development of NVM test templates for initial Teradyne J971 test platform and created equivalent templates for the Teradyne J750 platform in use at wafer probe.

· Responsible for development, verification, documentation and release of necessary device test programs to wafer probe.

· Co-developed challenging test application, for parallel high volume wafer probe which required extending the operating frequency of the test platform and resulted in the publication a of technical paper detailing the methods and results.

· Co-authored paper presented at the May 2003 Teradyne Users

group conference, Clocking Faster with Mux’d-MCG Mode on the Integra J750 based on test application work mentioned above.

· Extensive low-level assembly software development targeted for microcontroller memory self-test.

EDUCATION

Bachelor of Science Degree, Electronics Engineering Technology

Arizona State University, Tempe, Arizona

GPA 3.61 / 4.0 Maximum

Contact this candidate