Chakradara Ranuva
*******.***@*****.***
C/C++/Python software engineer offering more than ten years of full life cycle experience including planning, requirements definition, functionality design and development, coding, testing, QA, implementation. An expert in object-oriented design and development, implementation of distributed multi-threaded and multi-processing applications using C, C++, Boost Library, Unix system Server programming (Unix Internals), Design Patterns, IPC, Shell Scripting, Perl Scripting, Socket programming, TCP/IP Sockets, XML, Oracle, in Unix/Linux.
Professional Summary:
• Working experience of advanced level programming in C/C++ including thread synchronization multithreading, multi-processing, concurrency and TCP/IP Socket Programming.
• Enhanced the Cadence Verisium debug tool (Probing waveform DB).
• Knowledgeable about SS7 (TCAP protocol) GSM and telecom prepaid invoicing.
• Practical knowledge of ASN.1.
• Possess the ability to write Verilog design scripts. TECHNICAL SKILLS
Languages: C, C++, STL, Java, PL/SQL, Pro *C, Python, Shell Scripts. Protocols: TCP/IP, UDP, XML, SNMP.
Databases: Oracle, Sqlite.
Systems: Unix/Linux, Windows
Software & Tools: Rational Rose, Purify, C/C++ compilers, Gmake, Doxygen GUI: Eclipse, Vim
Experience:
Cadence Design Systems Inc. MA, USA
Role: Software engineer. May 2017 to present.
Project Name: Verisium Debug Tool
Responsibilities:
• Working on fixing and enhancing back-end database for HDL (Verilog and System Verilog) Verisium debugging.
• Created HDL designs using Python to test the performance of Verisium and its database.
• Used Google Asan and Python regression test scripts to stabilize the new feature.
• Fixed bottleneck issues to improve the application performance from 2X to 3X, by optimizing the inter-process communication and avoiding the deadlocks.
• In the project implementation, we chose the agile scrum and kanban processes.
• Involved in unit testing and regression testing.
• Worked on both the new feature's implementation and fixing customer issues, both as an individual contributor and in collaboration with other team members. Net Cracker Technologies, Hyderabad Jul 2011 to March 2013 Project Name: Global Rating Engine (GRE) for DHL Express System Role: Sr. System Analyst
Responsibilities:
• Involved in Enhancement of legacy components in C++.
• Supported software releases in QA and Production.
• Prepared High-Level Design and Low-Level Design.
• Worked on performance tuning algorithms to improve the efficiency of Perl and Pl/SQL programs.
• Worked on the module, Bill Rendering – A system that generates the invoices for the wholesale customers, which are then passed to printing systems to get the output in PDF format. XIUS, Hyderabad
Project Name: INFINET (Pre-Paid Billing Server)
Role: Sr. Software Engineer Oct 2006 to Jun 2011
Responsibilities:
• Designed and implemented various components like XML Parsers, Thread Pool and DB Connection Pool.
• Provided support and maintenance of the Service Oriented Architecture.
• Performed memory and performance analysis using profiling software such as IBM purify and Valgrind.
• Participated in functional and technical reviews.
• Worked on regression testing automation scripting.
• Designed shell scripts to automate UTC/ITC.
Education:
Master of Science in Computer Science: Rivier University, NH USA