Mercy Daniel
**** **** ***** **, ***** Rapids, MI 49525
M: 616-***-**** ● **********@*****.***
Design and Verification Engineer
Performance Simulation ● System-on-chip Verification ● Post sale support
Highly organized and detail-oriented achiever with an understanding of EDA tools, chip verification principles and functional expertise with an experience of 10 years. Experienced Application Engineer with excellent customer relation skills. Creative problem solving ability. Reliable, diligent and focused on a timely, quality completion of product delivery. Experience in hardware chip verification and product application.
PROFESSIONAL EXPERIENCE
Synopsys
Application Engineer, Senior I,May 2021-present
Worked with Synopsys Design Constraint verification with simulation to validate faster
turn –around time and improved simulation coverage
Created tests to validate Fine Grain Parallism and partial compile using VCS Simulator for faster turn-around simulation time
Worked with design bring ups for optimized regression with Verification Space optimization technology
Worked with converting and automating serial and parallel designs
Involved in providing solutions for a wide range of complex issues covering: usage, methodology,product defects, interoperability,licensing and installation.
Robert Half Company
IT Admin, April 2020-March 10,2021
Involved in helping customers login into their Michigan Web Assistant Manager System
Resolved login issues and fixed discrepancy in the account
Working with Fraud Investigation Project with the State of Michigan
Involved in helping claimants use the MiDas software to file claims for benefits.
Involved in certifying claimants for receiving benefits.
Nationwide trucking and brokers inc., grand rapids,MI
IT Assistant Admin, january 2019-September 2019
Worked with Traffic Management Software on Linux
Involved in Testing Mcleod Software
Resolved issues after verification
Worked with Accounting Team to manage Finances.
Resolved customer issues by working with the R&D team.
Involved in verifying all the new features in each version
Founder, Human Care Foundation/Homeschool Teacher
Haridwar, India, December 2006- June 2018
Founded a voluntary organization to promote environmental awareness
Helped and trained the team to achieve goals of the project with quality and efficiency
Worked as liaison between the city government and the organization to cast the vision of a green community
Awarded for engaging the community in the green revolution
Taught Math, English, Science and Social Studies for children in a homeschool environment
Started an “English Learning Center” for the community
Maintained portfolios and curriculum data for children throughout high school
Synopsys Inc., Mountain View, CA
Senior Corporate Application Engineer, Sep 2001 – Nov 2006
Supported Electronic Design Automation tool like VCS and VCS-MX.
Resolved customer issues by working with the R&D team.
Involved in verifying all the new features in each version and developed tests to reproduce bugs to enhance the simulator.
Worked with field Application consultants in pre-sales benchmarks and evaluations
Deployed new technologies at key customer sites performing software sanity testing
Worked with R&D/Marketing to add customer perspective specifications for new features/technology
Assisted in defining the scope for future enhancements, flows and methodologies
Involved in setting up and analysing benchmarks as well as preparing application notes, methodology articles, training material and solvnet articles
Report bugs using the CRM database.
Providing tech support for issues raised by customers.
Testing the Discovery Visual environment used for debugging Verilog/VHDL designs.
Helped customers integrate the product into their environment.
Developed interfaces for customer’s use cases.
Developed small tests or design patches requested by customers before a new release
Real Chip Communications, India
Design Engineer Feb 1997 – Aug 2001
Project: USB Host Traffic Generator and Controller in Verilog
Implemented features like interface power management, dribble bit, Interrupt out pipe
Implemented the spec changes of USB in the existing test bench.
Verified customer’s test bench with the simulation tools.
Developed test cases to test the functionalities of the USB core and the traffic generator.
Launched regressions with the test cases developed and monitored the results for qualification
Debugged the failing PCI, USB, Ethernet and System on chip test cases.
Develop testplans and testcases for different features and functionalities using verilog.
Automated 500 tests for Verification IP’s using cron utility.
Monitored the status of the tests and routed the failures to appropriate groups.
EDUCATION
Bachelor of Science (Computer Science Engineering), Madras University, India
TECHNOLOGY EXPERTISE
Hardware Platform: Solaris, Linux, HP
Tools : nc Verilog, Verilog XL, VCS, Modelsim, VCS MX
Language: Verilog, VHDL, C, C++, Python, System Verilog
Software: McLeod, TMS